Method of checking vehicle mounted electronic units

Details Method of checking vehicle mounted electronic units Method of checking vehicle mounted electronic units

2001-07-25

2003-11-25

Wachsman, Hal (Department: 2857)

Data processing: measuring, calibrating, or testing

Testing system

Signal generation or waveform shaping

C702S117000, C701S029000, C701S036000

Reexamination Certificate

active

06654702

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of checking electronic units mounted in a vehicle, e.g., a car. The invention also concerns a system for performing the above method.
2. Description of Background Information
Recent years have witnessed a remarkable development in the field of motor vehicle electronics. At the same time, electronic units mounting on board vehicles now call for larger scale circuitry. Microcomputer chips (e.g., microprocessors or microcontrollers)
2
are now thus commonly mounted into vehicle-mounted electronic units
1
(note FIG.
1
). Such a microcomputer chip
2
can function as a controller unit operative on various controlled systems (not shown in the figures).
Such a microcomputer chip
2
typically includes programs for proper car functioning, and programs specifically developed for internal checking. When it is operational in the vehicle, the programs for vehicle control functions are launched, whereas when circuits are to be inspected, the checking programs for checking are started.
When the vehicle is running, the programs for checking must be prevented from starting. For this purpose, the checking programs are designed such that they can be started only by inputting complex logic combinations at the microcomputer, the combination being chosen such that it does not occur during normal operation. For instance, if an ignition key is not inserted into an ignition socket, an ignition switch would not be expected to be turned in the car. Accordingly, the programs for checking may be designed so that they can start only when a detection signal for the inserted ignition key is active and the ignition switch is also turned on (i.e., the ignition key is inserted and rotated). In this manner, the programs for checking may not be triggered while the car is running. As shown in
FIG. 1
, an order signal may indicate e.g., that both the signal for detecting the inserted ignition key and the ignition switch are turned on. The signal order thus gives instruction to a test routine, and is delivered from a test device
3
to an ignition input circuit
4
(IG input circuit) contained in an electronic unit
1
for cars. The test device
3
may e.g., be a system for testing at the factory before shipment. Subsequently, the microcomputer chip
2
functions according to a program specific to a test to be performed. The microcomputer chip
2
then returns a response signal to the test device
3
via an output circuit e.g. a courtesy lamp driving circuit (courtesy LP driving circuit)
5
. The test device
3
can thus perform function tests, so as to determine whether the microcomputer chip
2
functions well and the input and output circuits work normally. Various input circuits, such as an ignition input circuit
4
, and output circuits such as a courtesy lamp driving circuit
5
, are commonly used in car electronic units. Consequently, these common circuits require no other specific equipment for testing.
The above test method employs a serial communications system including the test device
3
as a master system and the electronic unit
1
as a slave system. As shown in
FIG. 2
, communications are periodically sent from the test device
3
to the electronic unit
1
at a rate of 200 ms, irrespective of the presence or absence of an order (i.e., an instruction indicating whether a car-running program or a test program is launched). When an order is effectively to be given, an order signal
7
is loaded on a periodically passing communication. When an initial state (i.e., both the car-running programs and the test programs are put to rest) is to be maintained, an order signal indicating “no reference” is sent. When the order signal
7
is given, the microcomputer chip
2
is designed so as to output a response signal
8
after a processing time of tm (within the limit of 10 ms).
The tests for the functioning of the electronic unit
1
are thus performed by using a test device
3
, and carried out at the last step of the production process for the car electronic unit
1
. The larger the scale of the circuits in the electronic unit
1
, the greater is the test time. Therefore, although the serial communication system is applied, the processing time for the electronic unit
1
tends to increase, and creates a production problem.
FIGS. 3 and 4
show signal formats used in communications protocols in a known periodically performed transmission. Specifically,
FIG. 3
shows a format for order signal sent from the test device
3
to the electronic unit
1
, whereas
FIG. 4
shows a format for response signal sent from the electronic unit
1
to the test device
3
.
In the above two figures, reference ID indicates 8 bit data (B
7
~B
0
) giving orders, the contents of which are explained in Table 1.
TABLE 1
Hexa-
ID
decimal
Test mode
B7
B6
B5
B4
B3
B2
B1
B0
code
No test
0
0
0
0
0
0
0
0
00
Return the check sums
0
0
0
0
0
0
0
1
01
calculated by &mgr;-computer
Read-out the state on SW
0
0
0
0
0
0
1
0
02
input from common ports
Read-out the value from
0
0
0
0
0
0
1
1
03
A/D ports
Write-in the output from
0
0
0
0
0
1
0
0
04
common ports
Modify the periodicity of
0
0
0
0
0
1
0
1
05
W/D pulses
End of the test mode
1
1
1
1
1
1
1
1
FF
In the above table, the common ports signify the ports common for input and output. The A/D ports signify analog/digital ports, through which voltages are measured, converted into digital terms and read out. The W/D pulses (watchdog pulses) are generated by integrated circuits provided beside the microcomputer, and watch out for malfunctions in the microcomputer.
The data contained in the formats shown in
FIGS. 3 and 4
define order contents, as explained below. When ID contains digits “0000 0000” (“00” in the hexadecimal code), no test is performed. When ID contains digits “0000 0001” (“01”, ibid.), checksum values (C/S) calculated by the microcomputer chip
2
are requested to be returned. When ID contains digits “0000 0010” (“02”, ibid.), the input data concerning a switch (SW) for common port are read out. When ID contains digits “0000 0011” (“03”, ibid.), the data at A/D ports are read-out. When ID contains digits “0000 0100” (“04”, ibid.), the output from a common port is written-in. When ID contains digits “0000 0101” (“05”, ibid.), the periodicity of W/D pulses is modified. When ID contains digits “1111 1111” (“FF”, ibid.), the test mode is terminated.
In
FIGS. 3 and 4
, reference “DATA
1
” stores data designating port numbers.
For instance, when reading out the data regarding switch input for common ports (when ID is “0000 0010” in Table 1), DATA
1
includes 8-bit data which designate a port, from which the state on switch input are read out. When reading out data from A/D ports (when ID is “0000 0011” in Table 1), DATA
1
includes 8-bit data which designate a port, from which A/D values are read out. When writing-in output from common ports (when ID is “0000 0100” in Table 1), DATA
1
includes 8-bit data which designate a port, from which the output is written in.
Further in
FIGS. 3 and 4
, DATA
2
and DATA
3
are supplied with different data, depending on test contents.
When reading out information on switch input for common ports (when ID is “0000 0010” in Table 1), an order signal shown in
FIG. 3
does not use DATA
2
, so that all 8 bits of DATA
2
are supplied with a bit “0” (FIG.
5
). In a response signal (
FIG. 4
) to such an order signal, DATA
2
is supplied, bit by bit, with a high-level/a low-level state of each of 8 terminals No.
0
to
7
contained in the port, which is designated by “DATA
1
” for reading out the state on switch input (see FIG.
6
). In the eight bits of “DATA
2
” in
FIG. 6
, terminal No.
0
corresponds to the lowest bit level, while terminal No.
7
corresponds to the highest bit level. For instance, the port from which the input state regarding the switch is read out may be allocated port No.
1
(“0000 0001”), and only terminal No.
0
of this port may be put in a high state. Then, “DATA
1
” of the response signal is defined by bits “00

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