Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2003-02-28
2004-10-12
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C324S754090, C324S755090, C324S763010
Reexamination Certificate
active
06804807
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
Not applicable.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not applicable.
REFERENCE TO MICROFICHE APPENDIX
Not applicable.
FIELD OF THE INVENTION
The present invention relates generally to characterization of high-frequency electronic devices and more particularly to simulation and measurement of electronic devices using ground-signal-ground probes.
BACKGROUND OF THE INVENTION
Ground-signal-ground (“GSG”) probes are used to make radio-frequency (“RF”) and microwave (“MW”) measurements of electronic devices. A GSG probe has a signal probe contact (“finger”) between two ground probe fingers and can be used to measure electronic devices on wafer before they are separated for packaging. The GSG probe is brought in contact with the corresponding GSG pads on the electronic device and couples the device to a test instrument, such as a network analyzer, through a test cable.
Non-idealities in the test system (network analyzer, cables, fixture, etc.) introduce errors in the measured S-parameters that characterize the device under test (“DUT”). Some of these errors can be removed by calibrating the test system with calibration standards that provide equal (“balanced”) currents through their ground paths. These errors are typically non-idealities in the signal path of the test system (“signal path errors”). The errors in the test system will remain corrected as long as the current through the first ground finger of the GSG probe is assumed to be equal to the current through the second ground finger of the GSG probe when measuring an electronic device.
Unfortunately, some electronic devices do not produce balanced ground currents. If the ground currents of the measured electronic device are not equal, measurement errors, which are caused by non-idealities in the ground paths of the test system (“ground paths errors”), cannot be removed after calibration, resulting in an inaccurate measurement of the electronic device.
BRIEF SUMMARY OF THE INVENTION
An interface circuit model of a GSG probe (hereinafter “GSG interface model”) accounts for ground paths errors of a GSG probe that are not calibrated out using conventional calibration techniques. This GSG interface model can be thought of as existing at the interface between the calibrated GSG probe and a device under test (“DUT”), and can account for the measurement errors caused by unbalanced ground currents. In one embodiment, the GSG interface model includes a through path between a signal node and a signal source, a first inductance between a first ground node and a common ground, a second inductance between a second ground node and the common ground, and a mutual inductance between the first inductance and the second inductance.
The GSG interface model can be used to characterize electronic circuits having unbalanced ground currents. In one embodiment, a circuit model of an electronic device and a GSG interface model are entered into a simulator. The circuit model of the electronic device includes at least one signal port with associated first and second ground nodes (pads). The GSG interface model includes a first inductance between a common ground and the first ground node, a second inductance between the common ground and the second ground node, and a mutual inductance between the first self-inductance and the second self-inductance. A simulation of the electronic circuit and GSG probe is run to obtain a simulated characteristic of the electronic circuit and GSG probe. The simulated characteristic can be compared to the characteristic of the electronic device measured with the GSG probe, such as an on-wafer measurement of the electronic device.
In some embodiments, the value of the first inductance is equal to the value of the second inductance, and the value of the mutual inductance is the negative of the first inductance. In a particular embodiment, the first inductance and second inductance is L
corr
=(L
g
−M
2
)/2, and the value of the mutual inductance is M
corr
=−(L
g
−M
2
)/2, where L
g
is the self-inductance of a ground finger of the GSG probe and M
2
is the mutual inductance between the first ground finger and the second ground finger of the GSG probe.
REFERENCES:
patent: 5519366 (1996-05-01), Kaneko et al.
patent: 6469383 (2002-10-01), Welstand
patent: 6514783 (2003-02-01), Welstand
patent: 6639322 (2003-10-01), Welstand
patent: 2002/0011856 (2002-01-01), Huang et al.
Havens et al., “Impact of Probe Configuration and Calibration Techniques On Quality Factor Determination of On-Wafer Inductors for GHz Applications,” IEEE, Apr. 2002, pp. 19-24.*
Wang et al., “Measurement and Wavelet Denoising Parameters Extraction for MMIC On-Chip Square Spiral Inductors,” IEEE, Dec. 2001, pp. 1330-1333.*
Safwat et al., “Sensitivity Analysis of Calibration Standards For Fixed Probe Spacing On-Wafer Calibration Techniques,” IEEE, Jun. 2002, pp. 2257-2260.*
Arz et al., Wideband Frequency-Domain Characterization of High-Impedance Probes, ARFTG Conf. (NIST), 7 pages (Nov. 29, 2001).
Adamain et al., published U.S. patent application No. US 2002/0053899 A1, May 9, 2002.
Bradley Paul D.
Feld David A.
Jamneala Tiberiu
Agilent Technologie,s Inc.
Siek Vuthe
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