Method of automating place and route corrections for an...

Details Method of automating place and route corrections for an... Method of automating place and route corrections for an...

2007-11-27

2007-11-27

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

10977386

ABSTRACT:
A method and computer program product for automatically correcting errors in an integrated circuit design includes steps of: (a) performing a physical design validation of an integrated circuit design to verify compliance with a set of design rules; (b) generating a results database of design rule violations detected by the physical design validation; (c) identifying locations in the integrated circuit design from the results database for making design corrections according to a post-processing rule deck so that the locations of the design corrections comply with the set of design rules; and (d) implementing the design corrections in the integrated circuit design.

REFERENCES:
patent: 6009251 (1999-12-01), Ho et al.
patent: 6026224 (2000-02-01), Darden et al.
patent: 7076410 (2006-07-01), Kerzman et al.
patent: 7107559 (2006-09-01), Lakshmanan et al.
patent: 7117464 (2006-10-01), Frank et al.
patent: 2006/0090144 (2006-04-01), Lakshmanan et al.

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