Semiconductor device manufacturing: process – Including control responsive to sensed condition – Optical characteristic sensed
Reexamination Certificate
2000-05-01
2002-10-22
Sherry, Michael (Department: 2829)
Semiconductor device manufacturing: process
Including control responsive to sensed condition
Optical characteristic sensed
C438S106000, C257S676000
Reexamination Certificate
active
06468813
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a wire bonding process for use in forming a substrate based package and, more particularly, to a wire bonding process equipped with a function of automatically skipping defective work pieces.
2. Description of the Related Art
Conventional substrate based packages such as the plastic BGA package
100
(see
FIG. 1
) typically comprises a substrate
110
having a die covering area
112
(referring to
FIG. 2
) on the upper surface thereof and a die
120
disposed on the die covering area
112
. The upper surface of the substrate
110
is provided with a paddle
114
and a plurality of conductive traces
116
around the paddle
114
(see FIG.
2
). Referring to
FIG. 2
, the die covering area
112
is defined inside the paddle
114
and the distance from the boundary of the die covering area
112
to the boundary of the paddle
114
is about 15 mils. It is noted that when die
120
is mounted to the paddle
114
of the substrate
110
, the die covering area
112
will be entirely covered by the die
120
.
Referring to FIG.
1
and
FIG. 2
, the active surface of the die
120
is provided with a plurality of bonding pads connected to the conductive traces
116
of the substrate
110
through a plurality of bonding wires
124
. The lower surface of the substrate
110
is provided with a plurality of solder pads
118
electrically connected to corresponding conductive traces
116
. Each solder pad
118
is provided with a solder ball
130
for making external electrical connection. The paddle
114
, the conductive traces
116
and the solder pads
118
are usually made of metal with good electrical conductivity such as copper.
Typically, the substrate
110
is provided with a layer of solder mask
110
a
covering the surface thereof wherein lead fingers
117
of the conductive traces
116
adapted for connecting to the bonding wires
124
and the solder pads
118
are exposed from the solder mask
110
a.
In addition, the paddle
114
typically has some portions exposed from the solder mask
110
a
so as to form a plurality of thermal pads
113
used for heat transfer. Further, the upper surface of the substrate
110
is usually provided with several lead eyes
119
disposed outside the die covering area
112
wherein the lead eyes
119
are also exposed from the solder mask
110
a.
All of the surfaces of the thermal pads
113
, the lead fingers
117
, the solder pads
118
, and the lead eyes
119
are plated with a layer of gold or palladium for preventing oxidation and increasing bondability.
In production, it is desirable to integrally form a plurality of substrates in a strip (typically referred to as a “substrate strip”) having alignment holes so that the packaging process can be automated. In a conventional packaging process, the die
120
is attached to the die covering area
112
on the paddle
114
. Then, during a wire bonding operation, the bond wires
124
are connected to the bonding pads on the die
120
and the lead fingers
117
on the substrate
110
. Finally, the dies
120
, bonding wires
124
, and a portion of the substrate
110
including majority of the conductive traces
116
are encapsulated in a package body
140
. The present invention is directed to the wire bonding operation.
FIG. 3
shows a wire bonder with a substrate strip
200
installed therein illustrating conventional wire bonding operation. Usually, defective substrates of the substrate strip
200
are marked with white ink
210
so that defective substrates can be distinguished from other normal substrates. Therefore, only normal substrates of the substrate strip
200
have dies
120
mounted thereon. On the contrary, defective substrates are just dispensed with precise amount of epoxy but without dies
120
placed thereon. When the substrate strip
200
is indexed to properly position each die
120
under a bond head
220
, a camera (not shown), integrated into the bond head
220
and connected to a recognition system (not shown), will try to find and align the reference structures such as the lead eye
119
on the substrate or the die eye formed on the active surface of the die. When a defective substrate with white ink
210
is indexed to the bond head
220
, the wire bonder will emit an alarm to notify an operator because the camera cannot find the lead eye (masked by the white ink
210
) and the die eye (no die placed thereon). Then the operator will check the wire bonder and trigger a procedure for skipping the defective substrate, i. e., indexing the next to-be-bonded substrate to the bond head and re-performing the wire bonding operation.
However, in the conventional wire bonding operation described above, skipping of defective work pieces has only been dealt with manually in the past, causing significant operating down time and reduction of throughput. Moreover, when (a) the solder mask
110
a
is imaged and developed not so precisely as to cover a portion of the lead eye on the substrate or (b) the die eye on the semiconductor die becomes faint, the contour of the lead eye or the die eye will change a little such that it is easy to evaluate the lead eye or the die eye as not being present. This will lead to a result that work pieces are not defective but still skipped from wire-bonding.
Therefore, the present invention seeks to provide a method of automatically identifying and skipping defective work pieces which overcomes, or at least reduces the above-mentioned problems of the prior art.
SUMMARY OF THE INVENTION
It is a primary object of the present invention to provide a method of automatically identifying and skipping defective work pieces from normal work pieces which utilizes a reject eye formed inside the die covering area on a substrate to automatically determine whether the skipping procedure is triggered or not thereby reducing operating down time and increasing throughput.
It is another object of the present invention to provide a substrate for use in packaging of a semiconductor die, the substrate comprising at least a reject eye formed inside the die covering area of a substrate. The reject eye is adapted to be identified by a recognition system which gives a signal of stopping a wire bonding operation and triggering a skipping procedure when the reject eye is located on condition that no semiconductor die is disposed on the die covering area of the substrate.
The method of automatically identifying and skipping defective work pieces from normal work pieces used in a wire bonding operation in accordance with the present invention comprises: (a) finding and aligning the die eye of the die as well as the lead eye of the substrate; (b1) proceeding the wire bonding operation when the die eye and the lead eye is located; (b2) finding the reject eye when the die eye and the lead eye is evaluated as not being present; (c1) stopping the wire bonding operation and skipping to next work piece when the reject eye is located; (c2) stopping the wire bonding process and notifying an operator when the reject eye is evaluated as not being present; (c2′) re-finding and re-aligning the die eye of the die and the lead eye of the substrate when the reject eye is evaluated as not being present. The method of skipping defective work pieces of the present invention is capable of automatically determining whether the skipping procedure is triggered or not thereby reducing operating down time and increasing throughput.
The substrate for use in packaging of a semiconductor die in accordance with the present invention comprising a metal paddle disposed in the central region of the substrate a solder mask formed over the metal paddle wherein at least a portion of the metal paddle is exposed from the solder mask to form an irregular mark. The substrate has a die covering area defined inside the metal paddle for receiving a semiconductor die and an epoxy area adapted for epoxy to dispense thereon defined inside the die covering area wherein the irregular mark is located inside the die covering area but outside the epo
Chao Te Tsung
Fang Hui Chin
Advanced Semiconductor Engineering Inc.
Pert Evan
Stevens Davis Miller & Mosher LLP
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