Electrical computers and digital data processing systems: input/ – Access arbitrating – Hierarchical or multilevel arbitrating
Reexamination Certificate
2006-10-31
2006-10-31
Perveen, Rehana (Department: 2112)
Electrical computers and digital data processing systems: input/
Access arbitrating
Hierarchical or multilevel arbitrating
C711S151000, C710S107000, C710S240000, C710S242000, C710S244000
Reexamination Certificate
active
07130947
ABSTRACT:
The present invention provides a method of arbitration for resources which allows requestors from multiple frequency domains. Most requestors generate requests at full speed. A small number of low-speed requesters generate requests every two full-speed cycles, and hold their requests for two full-speed cycles. The arbitration method gives priority to the requests from the low-priority requesters and guarantees that two requests made by the half-speed requestors at the beginning of a low-speed cycle will be granted over the course of the low-speed cycle. The requests generated by the low-speed requestors are issued in phases. Issuance of later phases of a request is blocked when the request has been granted in an earlier phase.
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patent: 6401176 (2002-06-01), Fadavi-Ardekani et al.
Carwell Robert M.
Misiura Brian
Perveen Rehana
Walder, Jr. Stephen J.
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