Computer graphics processing and selective visual display system – Computer graphics display memory system – Graphic display memory controller
Reexamination Certificate
2002-02-05
2004-08-17
Bella, Matthew C. (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Graphic display memory controller
C345S531000, C345S534000
Reexamination Certificate
active
06778175
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a memory controller of computer graphics system. More particularly, the present invention relates to a method of the arbitration of memory requests for a computer graphics system.
BACKGROUND OF THE INVENTION
Since the speed of processors has been steadily increasing, therefore, the need for a more efficient memory controller to provide a faster memory access becomes an important subject. In a computer systems design, the delay of retrieving data from memory may result in a low performance. Thus, the latency of memory becomes a factor of bottleneck for limiting the improvement of performance.
FIG. 1
illustrates a block diagram showing the skeleton of typical 3-dimention (3-D) graphics engine. Referring to
FIG. 1
, a typical 3-D engine can be divided into several stages in pipeline: transform
14
, lighting
16
, setup
18
, scan converter
20
, color calculator
22
and texture-processing unit
24
, etc. The engine in each stage has its own graphic function. The engines of the stages of transform
14
and lighting
16
are used for geometric and color calculations, and the engine of the stage of setup
18
for initializing the primitive. Besides, the scan converter
20
can be used for deriving the pixel coordinate, and the color calculator
22
for generating smooth drawing color. The texture-processing unit
24
can be used for processing drawing texture. Further, the alpha blending
30
can be used for generating transparent and translucent effect. The depths test
26
can be used for removing pixel-based hidden surface, and the display controller
32
for accurately displaying images on the monitor
36
, and so on.
The 3-D graphics engine receives and executes the commands stored in the command queue
12
, and the memory controller
28
accesses the data in the graphics memory via the memory bus
40
. The command queue
12
is a first-in-first-out (FIFO) unit, and can receive and store command data from the controller
10
via the system bus
38
. A 3-D graphics engine in the accelerator reads different types of data from the display memory
34
, and writes different types of data to the display memory in order to perform drafting. For instance, the texture-processing unit
24
reads texture data for performing a texture mapping, and the depths test
26
accesses the depth information (Z-value) from Z buffer for hidden surface removal, and the alpha blending
30
reads the color value for color operating.
FIG. 2
illustrates a diagram of the contents of the display memory. Referring to
FIG. 2
, a display memory
50
contains a frame buffer
52
for storing pixel color values, a Z buffer
54
for holding depths information, and a texture buffer
56
for storing texture data. Also, the display memory
50
can further include other buffers such as an alpha buffer and a stencil buffer, etc.
All the graphics drawing operations involve in accessing many different types of display memory. Obviously, the display memory is easily to be congested if there are huge amount of accesses in different buffers during the rendering process. Hence, for increasing the performance of the 3-D pipeline, many request queues, such as color request queues, texture request queues, Z buffer request queues and so on, are used to prevent some stages from stalling and waiting required data. The memory controller
28
shown in
FIG. 1
is used to manage data accesses. The conventional method of the arbitration of a memory controller, such as a rotational priority scheme, is to assign fixed priorities to different types of requests, and then to service requests by their priorities. For instance, if there are three types of requests in the computer graphics system, and the types are the first type, the second type, and the third type, wherein the three types may respectively belong to the operations of read, write or the data of depth, color and texture data, etc., then the memory controller each time services a request of different type according to the priorities of the three types. For example, a request of the first type is first serviced, and then a request of the second type is serviced, and thereafter, a request of the third type is serviced, whereby all the requests are serviced.
Since the data of different types are stored in different pages, a convention arbitration method using rotational priority scheme often incurs the page-miss while accessing two consecutive data, and further reduces the bandwidth of memory due to read-write turnaround penalties. Therefore, the performance of accessing memory is reduced, and an inefficient pipelining is caused.
SUMMARY OF THE INVENTION
There are different types of requests of accessing data, and the conventional rotational priority scheme used in the memory controller may reduce the chances of accessing consecutive data of the display memory and increase the delays of accessing memory. Hence, the aspect of the present invention is to provide a method of arbitration of memory request for the computer graphics system, thereby determining the service order of requests of the display memory.
In view of the aforementioned aspects, the present invention, the method of the arbitration of memory requests for a computer graphics system, services a plurality of requests having a plurality of types. The present invention includes: (a) performing a defining step to determine that, only the requests of a first type in a first block are serviced in a first period; only the requests of a second type in the first block are serviced in a second period; and so on, only the requests of a Nth type in the first block are serviced in a Nth period; (b) performing the first period, to service the requests of a first type in the first block; (c) performing the second period, to service the requests of the second type in the first block; (d) and so on, performing the Nth period until all these requests in the first block have been serviced. The present invention further comprises the steps of repeating the above-mentioned steps (b), (c) and (d), to service the requests in a second block. The N value, standing for the number of the types, can be any positive integer, and be decided by the graphics system or operators.
In the method of the arbitration of memory request for a computer graphics system of the present invention, the aforementioned N types can be the functional parameters selected from the group consisting of Z-read, Z-write, texture-read, texture-write, color-read, and color-write, wherein the functional parameters are used in a graphics system. The above-mentioned block can comprise a tile or a plurality of tiles. The present invention further provides two preferred embodiments according to the aforementioned method of arbitration, to obtain more streamlined pipelining.
The present invention groups the requests and provides services thereto according to the property of the 3-D pipelining. Thus, based on the present invention, the method of the arbitration increases the chances of accessing consecutive memory data, and has the advantages of reducing memory page-miss and read-write turnaround penalties. Therefore, the useful memory bandwidth is increased so that the data transformation between the display memory and the request initiator is speeded up.
REFERENCES:
patent: 5852451 (1998-12-01), Cox et al.
patent: 6396503 (2002-05-01), Goss et al.
patent: 6438670 (2002-08-01), McClannahan
Liu Yuan-Chin
Yeh Kuo-Wei
Bella Matthew C.
Chan Raymond Y.
David and Raymond Patent Group
Quillen Allen E.
XGI Technology Inc.
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