Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2001-07-16
2004-06-22
Beausoliel, Robert (Department: 2184)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S025000, C714S042000, C714S718000
Reexamination Certificate
active
06754849
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a method of and apparatus for testing a CPU built-in RAM mixed LSI using a BOST (Built Out Self Test) board.
BACKGROUND OF THE INVENTION
Conventionally, in order to attain miniaturization, high speed and low power consumption of electronic equipments, attention has been paid to a technique relating to a CPU built-in RAM mixed LSI (“LSI”) in which RAM, such as DRAM and SRAM, an CPU, manufactured individually, are mounted onto one chip. Before use thereof, it is necessary to test such an LSI.
Conventionally, when testing the LSI, the LSI for test is mounted onto a test board, and respective signal terminals, power-supply terminals, and the like of the LSI are connected to corresponding terminals of a tester so that predetermined signals are directly output from the tester to the LSI.
However, in the above-mentioned conventional test method, a memory in the LSI is directly accessed via a circuit in the tester that is dedicated to the test. This method of accessing the memory is different from the method with which the memory in the LSI is normally accessed. Precisely, in a normal case the memory is accessed through a CPU built in LSI, however, during the test the memory is accessed from the test dedicated circuit in the tester, i.e. not through the CPU in LSI. As mentioned above, in the conventional method, since the method of accessing the memory at the time of the test is different from the method of accessing the memory at the time of the normal LSI operation, defective products cannot be screened completely, and thus test accuracy is not good.
In addition, in the case where an operating frequency of the tester is lower than the operating frequency of the LSI, since the test is conducted with a lower frequency than that of the normal LSI operation, defective products cannot be screened completely. Therefore, in order to conduct an accurate test, the tester itself is changed so as to cope with the operating frequency of the LSI. This raises testing costs.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method of and apparatus for testing CPU built-in RAM mixed LSI which allows the LSI to be tested through the built-in CPU.
In the present invention, the tester outputs a switching signal and an another signal. A ROM and a switching unit are mounted on the test board. The ROM stores a computer program which when executed makes it possible to conduct the self test by an access from said CPU of said LSI to said mixed RAM. The switching unit operates based on the switching signal output by the tester and establishes a signal path between the LSI to be tested and the another signal output terminal of said tester, or said ROM. When the switching unit establishes a signal path between the LSI and the ROM, the CPU of the LSI loads the computer program stored in the ROM into a main memory. Thus, the computer program stored in the ROM can be directly loaded into the main memory, and the self test can be performed by the CPU by accessing the mixed RAM.
Other objects and features of this invention will become apparent from the following description with reference to the accompanying drawings.
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Beausoliel Robert
Leydig , Voit & Mayer, Ltd.
Renesas Technology Corp.
Wilson Yolanda L
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