Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2002-09-16
2011-11-15
Rinehart, Mark (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C137S100000, C710S052000, C711S170000, C711S173000
Reexamination Certificate
active
08060680
ABSTRACT:
A method of allocating memory in a memory unit includes creating a data structure containing a list of all available memory segments; and assigning a bias to each available memory segment. The bias indicates how to allocate that available memory segment in response to a resource request wherein the resource request is for a new entry in the memory unit that will be fragmented with at least two fragments of the new entry in the memory unit at being at different locations in the memory unit, the bias for an available memory segment comprising an indication of where within the new fragmented entry to be made in the memory unit a corresponding available memory segment should be used.
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Jane Radatz, The IEEE Standard Dictionary of Electrical and Eletronics Terms, Sixth Edition, pp. 87-88.
Lee Terry Ping-Chung
Marsh James Lawrence
Daley Christopher A
Hewlett--Packard Development Company, L.P.
Rinehart Mark
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