Method of aligning nanowires

Details Method of aligning nanowires Method of aligning nanowires

2000-02-02

2001-06-19

Bowers, Charles (Department: 2813)

Semiconductor device manufacturing: process

Radiation or energy treatment modifying properties of...

Ionized irradiation

C257S734000

Reexamination Certificate

active

06248674

ABSTRACT:

TECHNICAL FIELD
The present application is generally directed to nanoscale computing and memory circuits, and, more particularly, to the formation of nanowires for device applications, specifically, to the alignment of such nanowires.
BACKGROUND ART
With the constantly decreasing feature sizes of integrated-circuit devices, the need for increasingly fine, lithographically-defined patterning is limiting further advances of the technology. Consequently, a growing amount of effort is being devoted to self-assembly techniques to form switching elements without fine-scale lithography; see, e.g., C. P. Collier et al, “Electronically Configurable Molecular-Based Logic Gates”,
Science
, Vol. 285, pp. 391-394 (Jul. 16, 1999). The self-assembled switching elements may be integrated on top of a Si integrated circuit so that they can be driven by conventional Si electronics in the underlying substrate. To address the switching elements, interconnections or wires, preferably also formed by self-assembly, are needed. The self-assembled wires connecting the conventional electronics to the self-assembled switching elements should be anchored at locations defined by the underlying circuitry and should preferably comprise materials compatible with Si integrated-circuit processing.
Recent reports have shown that catalytic decomposition of a Si-containing gas by a metal, such as Au or Fe, can form long “nanowires”; see, e.g., J. Westwater et al, “Growth of silicon nanowires via gold/silane vapor-liquid-solid reaction”,
Journal of Vacuum Science and Technology B
, Vol. 15, pp. 554-557 (May/Jun. 1997) and A. M. Morales et al, “A Laser Ablation Method for the Synthesis of Crystalline Semiconductor Nanowires”,
Science
, Vol. 279, pp. 208-211 (Jan. 9, 1998). These studies were based an earlier-developed technique frequently called the vapor-liquid-solid (VLS) mechanism. A liquid alloy droplet containing the metal and Si is located at the tip of the wire and moves along with the growing end of the wire. The wires may either be formed in the gas phase or anchored at one end on a substrate; see, e.g., J. L. Liu et al, “Gas-source MBE growth of freestanding Si nano-wires on Au/Si substrate”,
Superlattices and Microstructures
, Vol. 25, pp. 477-479 (1999). However, Au and Fe migrate into Si rapidly and create deep levels, which can degrade devices, such as addressing circuitry and other portions of the system formed by conventional Si integrated-circuit technology.
Titanium and TiSi
2
are compatible with integrated-circuit technology and are frequently used in Si circuits to reduce resistance of silicon and polycrystalline-silicon conducting regions. Although Ti forms deep levels in Si, its solubility and diffusion coefficient in Si are low, and the deep levels are not at mid-gap. With suitable handling, Ti is generally accepted in integrated-circuit facilities.
Long, thin “nanowires” of silicon or other materials, such as carbon, can be formed by catalyst-enhanced reaction of gaseous precursors; see, e.g., the abovementioned patent application 09/280,048. The catalysts are often metal-containing nanoparticles either on the surface of a substrate or suspended in the reactor ambient. The nanowires may be useful in electronic or other devices as either connections to an electronic element such as a switch or as electronic elements themselves; see, e.g., the above-mentioned patent applications Ser. Nos. 09/280,225, 09/280,045, 09/280,189, and 09/280,188.
After the nanowires are formed, they are often randomly arranged, either attached at one end to a substrate or with both ends free. Nanowires with both ends free may subsequently be attached at one end to the substrate. A method of aligning the nanowires attached at one end to the substrate is needed to realize potential applications. For many applications, having the wires parallel to each other and possibly parallel to the substrate surface would aid fabrication. In one possible geometry, the wires would serve as one set of electrodes on which switching elements would be formed, and completed by an orthogonal array of counter-electrodes above the switching elements.
DISCLOSURE OF INVENTION
In accordance with the present invention, a method of aligning nanowires on a substrate is provided. First, a plurality of the nanowires is formed on the substrate, then the plurality of nanowires is exposed to a flux of energetic ions. The flux of energetic ions serves to align the nanowires parallel to each other. The flux of energetic ions may also be used to align the nanowires parallel to the substrate surface. The alignment of the nanowires parallel to the substrate may employ essentially the same energy or a higher energy than that used to align the nanowires to each other. Further, the alignment of the nanowires relative to the substrate may occur either in the same step as the alignment of the nanowires relative to each other or subsequently.


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J.L. Liu et al, “Gas-source MBE growth of freestanding Si nano-wires on Au/Si substrate”, Superlattices and Microstructures, vol. 25, pp. 477-479 (1999).
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