Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-03-17
1999-08-03
Beausoliel, Jr., Robert W.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711 11A, G06F 1100
Patent
active
059335939
ABSTRACT:
In a client/server computer system, a method for writing modified data in a cache memory back to a database residing in a hard disk drive. Rather than writing back all of the modified data as part of a checkpointing operation, the present invention designates an amount of the cache memory that is to be cleared for a pre-determined time interval. The amount of cache memory to be cleared is based on an estimate of how much new data is anticipated to be cached. Thereby, just enough memory is cleared and made available so as to accommodate the storage of new data. For the modified data which are to be written back to the database, a lazy writeback operation is utilized.
REFERENCES:
patent: 5608865 (1997-03-01), Midgely et al.
patent: 5734814 (1998-03-01), Corbin et al.
patent: 5774643 (1998-06-01), Lubbers et al.
Anderson Richard
Arun Gopalan
Frank Richard
Wright William A.
Beausoliel, Jr. Robert W.
Elisca Pierre E.
Oracle Corporation
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