Static information storage and retrieval – Systems using particular element – Ferroelectric
Reexamination Certificate
2000-12-18
2001-12-04
Elms, Richard (Department: 2824)
Static information storage and retrieval
Systems using particular element
Ferroelectric
C365S149000
Reexamination Certificate
active
06327173
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a writing and reading method for a non-volatile memory having a ferroelectric capacitor. The material between the capacitor plates has a hysteresis behavior and the non-volatile memory behavior is based on remanent states that are maintained even without externally applied voltage. In order to read out the stored states, a voltage is applied externally to the capacitor and a sense amplifier evaluates the shifted quantity of charge which is dependent on the originally stored state, destructive reading taking place which makes it necessary to write the information back. Ferroelectric materials used typically include PZT (lead zirconium titanate), PLZT (lanthanum-doped PZT), SBT (strontium bismuth tantalate) or SBTN (niobium-doped SBT). Such materials exhibit changes in the hysteresis curve caused by aging. Measurements on such ferroelectric thin films have shown that the hysteresis curve, that is to say the relationship between polarization and an applied voltage, shifts when a stored state is maintained over a relatively long time. The latter effect is referred to as an “imprint”, a static imprint and a dynamic imprint being possible.
In a static imprint, the voltage is not changed at all or is changed only over a relatively long period of time, and, in a dynamic imprint, a transition takes place from a remanence state to saturation and then back to the same remanence state, this typically occurring when the same information item is repeatedly read and written back. In order to achieve reliable detection of the memory states, that is to say a sufficient charge difference during reading, it is possible to enlarge the cell capacitor, but this leads to the chip area being enlarged in a disadvantageous manner.
Published, European Patent Application EP 0 767 464, U.S. Pat. No. 5,262,982 and IEEE Proceedings/VLSI and Computer Peripherals/VLSI and Microelectronics, Application in Intelligent Peripherals and Their Interconnection Networks, May 8-12, 1989, pages 1 to 20 to 1 to 23, disclose ferroelectric memories and an associated reading method in which a reduction of the service life on account of the aging properties of the ferroelectric material is avoided as far as possible, for example by avoiding polarization reversal. What is involved in this case is aging caused by frequent changing of the memory state; in the case of the imprint effect, by contrast, to an extent aging occurs because the changing is too infrequent.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a method for writing and reading a ferroelectric memory that overcomes the above-mentioned disadvantages of the prior art methods, in which reliable reading of stored information is made possible over a relatively long period of time despite the aging properties of the ferroelectric material (imprint) and without requiring additional area for forming the memory.
With the foregoing and other objects in view there is provided, in accordance with the invention, a writing method which includes the steps of writing in of an information item which is complementary to an actual information item in a ferroelectric memory; and writing in the actual information item in the ferroelectric memory.
The invention relates to preventing or at least reducing a dynamic imprint by virtue of the fact that all states of the hysteresis curve are always run through a writing or reading cycle.
In accordance with an added feature of the invention, there is the step of writing in with a write voltage equal to zero in the ferroelectric memory subsequently to the writing in of the actual information.
With the foregoing and other objects in view there is further provided, in accordance with the invention, a method for reading a ferroelectric memory. The method includes performing a first reading process that proceeds from a positive
egative polarity. In which a read voltage is applied such that the read voltage initially becomes positive
egative, then negative/positive and once again positive
egative before it finally assumes a value of zero again at an end of a reading operation. A second reading process is performed which proceeds from a negative/positive polarity, given that the read voltage is equal to zero, the read voltage is applied such that the read voltage is initially positive
egative and then negative/positive before it finally assumes the value of zero again at the end of the reading operation.
In accordance with a concomitant feature of the invention, the first reading process and second reading process last an equivalent length of time because the read voltage is negative/positive for a longer period in the second reading process than in the first reading process.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a method for writing and reading a ferroelectric memory, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
REFERENCES:
patent: 5262982 (1993-11-01), Brassington et al.
patent: 5666305 (1997-09-01), Mihara et al.
patent: 5726930 (1998-03-01), Hasegawa et al.
patent: 5835399 (1998-10-01), Jeon
patent: 6118688 (2000-09-01), Hirano et al.
patent: 6215693 (2001-04-01), Chung et al.
patent: 0 767 464 A2 (1997-04-01), None
patent: 0 928 004 A2 (1999-07-01), None
patent: 410150157-A (1998-06-01), None
Fred P. Gnadinger: “High Speed Nonvolatile Memories Employing Ferroelectric Technology”, 1989 IEEE Proceedings/VLSI and Computer Peripherals/VLSI, pp. 20-23.
Elms Richard
Greenberg Laurence A.
Infineon - Technologies AG
Lerner Herbert L.
Nguyen Hien
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