Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Patent
1998-11-06
2000-12-19
Lintz, Paul R.
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
703 15, 716 1, 716 4, 716 5, 716 12, Q06F 1750
Patent
active
061638765
ABSTRACT:
A complete procedure for verifying register-transfer logic against its scheduled behavior in a high-level synthesis environment is provided. A new method that is both complete and practical for verification is provided. Hardware verification is known to be a hard problem and the proposed verification technique leverages off the fact that high-level synthesis--performed manually or by means of high-level synthesis software--proceeds from the algorithmic description of the design to structural RTL through a sequence of very well defined steps, each limited in its scope. Equivalence checking task is partitioned into two simpler subtasks, verifying the validity of register sharing, and verifying correct synthesis of the RYL interconnect and control. While state space traversal is unavoidable for verifying validity of the register sharing, irrelevant portions of the design are automatically abstracted out, significantly simplifying the task that must be performed by a back-end model checker.
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Ashar Pranav
Bhattacharya Subhrajit
Mukaiyama Akira
Raghunathan Anand
Lintz Paul R.
NEC USA Inc.
Speight Jibreel
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