Method for validating simulation results of a system as well...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000

Reexamination Certificate

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07127686

ABSTRACT:
The invention creates a technology for validating simulation results. The quickly growing number of components in modern complex systems often necessitates the introduction of abstractions, that render said systems manageable. However the abstractions, which often are based simplified assumptions, may impair the simulation results. The automatic post-processing method according to the invention safeguards the validity of the result. In most cases this can be reached, without restoring the complete description, which generally is too complex. The method, which is described for the validation of calculated counter-examples in an equivalence comparison of digital circuits can be used in all other applications, that allow for an analagous formalization of the abstraction step.

REFERENCES:
patent: 5867399 (1999-02-01), Rostoker et al.
patent: 5870588 (1999-02-01), Rompaey et al.
patent: 6154719 (2000-11-01), Saitoh et al.
patent: 6848088 (2005-01-01), Levitt et al.
patent: 2004/0025127 (2004-02-01), Takenaka
International Preliminary Examination Report from PCT/EP02/009640, filed Aug. 29, 2002.

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