Method for validating pre-process adjustments to a wafer...

Cleaning and liquid contact with solids – Processes – Using solid work treating agents

Reexamination Certificate

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Details

C134S009000

Reexamination Certificate

active

06368416

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates generally to semiconductor fabrication and, more particularly, to a method for validating pre-process adjustments to a wafer cleaning system.
In the fabrication of semiconductor devices, a variety of wafer preparation operations are performed. The goal of some of these wafer preparation operations is to remove unwanted residual material from the surface of a wafer after fabrication operations such as, for example, plasma etching and chemical mechanical planarization (CMP). As is well known to those skilled in the art, any unwanted residual material left on the surface of the wafer for subsequent fabrication operations may cause defects that render devices on the wafer inoperable. Consequently, effective wafer preparation operations are essential to obtaining a high yield rate.
FIG. 1A
shows a schematic diagram of a conventional wafer cleaning system
50
. The cleaning system
50
includes a load station
10
where a plurality of wafers in a cassette
14
may be inserted into the system for cleaning. Once the wafers are inserted into the load station
10
, a wafer
12
may be taken from the cassette
14
and moved into a brush station
16
, which includes a first brush box
16
a
and a second brush box
16
b
. The wafer
12
is first moved into first brush box
16
a
, where the wafer is scrubbed in a solution containing specified chemicals and deionized (DI) water. The wafer
12
is then moved into second brush box
16
b
, where the wafer is again scrubbed in a solution containing specified chemicals and DI water. After the wafer
12
has been scrubbed in brush boxes
16
a
and
16
b
, the wafer is moved into a spin, rinse, and dry (SRD) station
20
where DI water is sprayed onto the top and bottom surfaces of the wafer as the wafer is spun. After the wafer
12
has been dried, the wafer is moved from SRD station
20
to an unload station
22
.
Until recently, efforts to control wafer contamination have focused primarily on the top side of wafers. As the semiconductor industry moves to larger, e.g., 300 mm, wafers and to smaller, e.g., 0.18 &mgr;m and smaller, feature sizes; however, it is becoming increasingly more important to control wafer contamination on both the top and bottom sides of wafers. One way that wafers can be exposed to particulate contamination is through contact with mechanical components of the brush station as the wafers move along the wafer transfer path. In an effort to avoid such undesirable contact, pre-process adjustments are made to the mechanical components of the brush station before the processing of wafers begins. These pre-process adjustments are formulated to set the clearances between the mechanical components of the brush station, e.g., the track and other parts and assemblies, such that there is no undesirable contact between the wafers and such mechanical components of the brush station as the wafers move along the wafer transfer path.
Once the pre-process adjustments have been made and the processing of wafers begins, an operator can watch a wafer as it moves along the wafer transfer path and see whether any undesirable contact occurs between the top side of the wafer and mechanical components of the brush station. Unfortunately, however, the operator cannot see whether any undesirable contact occurs between the bottom side of the wafer and mechanical components of the brush station because the operator cannot see through the opaque wafer. Consequently, the operator has no reliable way of confirming that the wafer transfer path is unobstructed as far as the bottom side of the wafer is concerned. Thus, at present, it is difficult to control wafer contamination on the bottom side of the wafer in a brush station.
Another way that wafers can be exposed to particulate contamination is through contact with the carriage conveyor as the wafers are being transferred into and out of a SRD station. During this transfer process, a carriage conveyor must be moved just below the bottom side of the wafer. If the pre-process adjustments to the carriage conveyor and the SRD station are not sufficiently precise, then the carriage conveyor may contact the bottom side of the wafer and introduce particulate contamination. As the wafer is being transferred into and out of the SRD station, an operator has no reliable way of determining whether the carriage conveyor is coming into contact with the bottom side of the wafer because the opaque wafer blocks the operator's view of the carriage conveyor. Thus, at present, it is difficult to control wafer contamination on the bottom side of the wafer as the wafer is transferred into and out of the SRD station.
In addition to the scrubbing operations described above, current efforts to avoid particulate contamination on wafers also include a number of rinsing operations. In particular, upper and lower rinse manifolds, which are typically located at the entrance to the first brush box and the exits from the first and second brush boxes in the brush station, spray DI water on the top and bottom sides of wafers, respectively. The top and bottom sides of wafers also are sprayed with DI water during the spin rinsing operation performed in the SRD station.
FIG. 1B
is a simplified schematic crosssection illustrating the conventional technique used to spray DI water on the bottom side of a wafer in the SRD station. As shown therein, wafer
12
is supported in bowl
24
by rollers
26
, which contact the edge of the wafer to avoid introducing contaminants to either top side
12
a
or bottom side
12
b
of the wafer. A nozzle
28
, which is coupled in flow communication with source
30
of DI water, is positioned at the bottom of bowl
24
. As wafer
12
is spun, nozzle
28
sprays DI water toward the bottom side
12
b
of the wafer.
In each of the foregoing rinsing operations, an operator can readily determine whether the spray of DI water is properly contacting the top side of the wafer by merely observing the wafer. The operator, however, has no reliable way of determining whether the spray of DI water is properly contacting the bottom side of the wafer because the opaque wafer blocks the operator's view of the spray. For example, as shown in
FIG. 1B
, wafer
12
blocks the operator's view of the spray of DI water from nozzle
28
during the spin rinsing operation. Similarly, the wafer blocks the operator's view of the spray of DI water from the lower rinse manifolds in the brush station. In the event the spray of DI water does not properly contact the bottom side of a wafer in any of the foregoing rinsing operations, then the rinsing operation may not thoroughly remove particulate contamination from the bottom side of the wafer. If the amount of particulate contamination on the bottom side of the wafer exceeds acceptable levels, then the yield rate may be decreased significantly.
In view of the foregoing, there is a need for a reliable technique for determining whether the pre-process adjustments to a wafer cleaning system are sufficient to avoid undesirable contact between wafers to be processed and mechanical components of the system. There is also a need for a reliable technique for confirming that the bottom side of a wafer is being adequately contacted with liquid, e.g., DI water, during rinsing operations.
SUMMARY OF THE INVENTION
Broadly speaking, the present invention provides a substantially transparent wafer that may be used to observe, test, and validate adjustments made to wafer cleaning equipment before running in-process semiconductor wafers through such equipment. The substantially transparent wafer may be used to confirm that the wafer transfer path is unobstructed and to confirm that liquid sprayed from below the wafer during rinsing operations properly contacts the bottom side of the wafer.
In accordance with one aspect of the present invention, a method for validating pre-process adjustments to a wafer cleaning system is provided. This method includes the operations of (a) making pre-process adjustments to a wafer cleaning sys

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