Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-08-16
2005-08-16
Chace, Christian P. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S153000, C711S173000, C714S045000, C717S128000
Reexamination Certificate
active
06931492
ABSTRACT:
A method is disclosed for instructing a computing system to allocate a trace array from an original cache memory, where the method includes dividing the original cache memory into a reduced-size cache memory and a trace array, permitting storage of trace signal data into the trace array, and permitting retrieval of the trace signal data from the trace array.
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Fox David B.
Hoke Joseph M.
Lo Tin-Chee
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