Method for using a multi-bit cell flash device in a system...

Details Method for using a multi-bit cell flash device in a system... Method for using a multi-bit cell flash device in a system...

2011-06-28

2011-06-28

Lane, Jack A (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S154000

Reexamination Certificate

active

07970984

ABSTRACT:
A computerized system is booted from a flash memory device configured to always operate one or more of its blocks only in a M-bit-per-cell mode and the rest of its blocks in a N>M-bit-per-cell mode. When the system is powered up, an initialization program is retrieved from the M-bit-per-cell block(s), corrected for errors using a first error correction method, and executed. Data accessed subsequently from the N-bit-per-cell blocks are corrected using an error correction method that corrects more errors per block than the first error correction method.

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