Method for trimming a two-point modulator, and a two-point...

Details Method for trimming a two-point modulator, and a two-point... Method for trimming a two-point modulator, and a two-point...

2004-08-20

2008-03-25

Bocure, Tesfladet (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S295000

Reexamination Certificate

active

07349516

ABSTRACT:
A PLL circuit (1) is regulated by means of a digital modulation signal (28) at a first frequency, and is then regulated at a second frequency, by deactivation of the digital modulation signal (28). A difference signal (32), which is characteristic of the voltage change in a control signal (22) for the VCO (7) which is produced by deactivation of the digital modulation signal (28) is compared with an analog modulation signal (34). The analog modulation signal (34) is changed so as to correct any discrepancy determined during the comparison.

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Durdodt et al., “A Low-IF RX Two Point Modulation TX CMOS Single Chip Bluetooth Solution,” IEEE, 2001, pp. 1531-1537. to.

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