Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Patent
1998-04-29
2000-10-17
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
711103, 711173, G06F 1204
Patent
active
061346403
ABSTRACT:
A method for transforming a logic format includes dividing a data segment into a main data segment having a main segment length and a sub data segment having a sub segment length shorter than the main segment length, allotting the main data segment and the sub data segment respectively to a main address and a sub address of a data storage unit, and defining a combination of a data format of a main data area defined by the main segment length and the number of main addresses and of a data format of a sub data area defined by the sub segment length and the number of sub addresses, as a logic format of the data storage unit. A determination is made at an arbitrary time whether the average of the length of all the data stored in the data storage unit is less than a threshold value. The sub segment length is shortened in response to a determination that the average length of all the data stored in the data storage unit is less than a threshold value. A portion of the sub data area thereby freed-up is allotted to the main data area so as to increase the number of the main addresses.
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Technical Bulletin Published by Janan Institute of Invention and Inovation, No. 97--1606, Published on Mar. 3, 1997, Yuji Niimura.
Niimura Yuji
Unno Yusaku
Chan Eddie P.
OKI Electric Industry Co., Ltd.
Verbrugge Kevin
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