Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1999-01-26
2001-07-31
Dharia, Rupal (Department: 2181)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S108000, C710S108000, C710S120000, C710S120000
Reexamination Certificate
active
06269415
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a data transfer method for transferring data with address buses, a data transfer program storage medium in which this data transfer method is stored, and information processing equipment, a card-shaped medium and an external storage medium to be used in the data transfer method.
2. Description of the Prior Art
Recently, to expand the possibility of information processing equipment such as personal computers, PC cards have been proposed. The PC card is a card-shaped medium, and when used, it is inserted in an exclusive slot provided in a personal computer. A PC card, when inserted into the slot, is connected to the personal computer via a data bus and an address bus. PC cards are available in various kinds such as those which function as a storage medium and those which act as an interface with equipment connected to external. The user is allowed to make use of the function of an inserted PC card in a personal computer only by changing the PC card to be inserted into the slot. Thus, it has been becoming possible to expand and change the functions of personal computers simply and readily.
However, currently common PC cards are to be connected to personal computers with a 16-bit long data bus, being capable of transferring only 16-bit data at a maximum in 1-cycle data transfer. As a result of this, there has been an issue that long time would be taken from start to end of data transfer when the volume of the data to be transferred is as large as 64 Kbyte or so.
Meanwhile, in some personal computers, larger capacity of memory space that can be specified with the address bus is allocated relative to the actually installed memory capacity. In such equipment, it is seldom the case that the whole address bus is used, and there exist, in most cases, address bus bit lines that are not used but idling. With attention given to this fact, there have been proposed methods for transferring data by using these idling address bus bit lines (Japanese Patent Laid-Open Publications SHO 56-143049, SHO 61-184655, SHO 62-254050 and HEI 2-23045).
However, since these methods use the idling address bus bit lines for data transfer, the amount of data which can be transferred using the address bus varies depending on the number of bits (free capacity of the address bus), as a problem. Moreover, there has been another problem that the data transfer method could not be executed if no idling address bus bit lines are present (when the address bus has no free capacity).
An object of the present invention is to provide a data transfer method which, in data transfer, allows part of the data to be transferred anytime by using the address bus, thus having accomplished a reduction in time required for data transfer.
Another object of the present invention is to provide a data transfer program storage medium in which programs for executing the above data transfer method are stored, and information processing equipment serving as a transfer source, as well as a card-shaped medium and an external storage medium serving as transfer destinations when this data transfer method is executed.
SUMMARY OF THE INVENTION
The present invention provides a data transfer method comprising:
a first step for, setting a part of transfer data to be transferred as address data and writing the rest of the transfer data to a memory area specified by the address data in a memory-to-memory data transfer mode; and
a second step for transferring the data of the memory area to a transfer destination in a block transfer mode.
The present invention also provides a data transfer program storage medium which has stored a program including the first step and the second step.
The present invention further provides information processing equipment to which the data transfer method is applied, wherein length of data which is carried on a data bus is longer than length of data which is carried on an address bus in the block transfer mode.
The present invention further provides a card-shaped medium which comprises means for insertion into a slot provided in information processing equipment, and which serves as the transfer destination in the data transfer method.
The present invention further provides the card-shaped medium, wherein length of data which is carried on a data bus is longer than length of data which is carried on an address bus.
The present invention further provides external equipment comprising: an address bus terminal, a data bus terminal, and a multiplexer for selectively fetching data on the address bus inputted at the address bus terminal or data on the data bus inputted at the data bus terminal during the block transfer mode, and outputting the selected data onto an internal data bus.
The present invention further provides the external equipment, wherein each of the address bus terminal and the data bus terminal comprises a terminal which can be inserted into a slot provided in the information processing equipment, and wherein the external equipment has a card shape as a whole.
The memory-to-memory transfer mode herein refers to a mode which comprises a cycle during which a CPU of a transfer side equipment outputs an address where transfer-source data has been stored, onto an address bus and the data stored at the address is read by an data bus, and a cycle during which the transfer-destination address is outputted to the address bus and the read transfer-source data is outputted to the data bus so that the transfer-source data is transferred.
Also, the block transfer mode herein refers to a mode which comprises a cycle during which the CPU of the transfer side equipment first sets a leading address in a transfer destination where data to be transferred to the transfer destination as well as an amount of data to be transferred, a cycle during which an address where the transfer-source data has been stored is outputted onto the address bus, and the data stored at the address is read to the data bus, and a cycle during which a transfer-destination addresses successively incremented are outputted to the address bus and the read data is outputted to the data bus so that the data is transferred.
In the block transfer mode, a leading address where the data to be transferred to the transfer destination should be stored as well as the amount of the data to be transferred are set in the first step. Therefore, in the subsequent cycle of actually transferring data, the successively incremented addresses on the address bus are not used as address information of the transfer destination. Thus, in the data transfer method of the present invention, an address is specified by a part of the transfer data, and the rest of the transfer data is written into a memory area specified by the address data. This process is executed in the memory-to-memory transfer mode. Then, the data of the address specified by a part of the transfer data is transferred in the block transfer mode. Accordingly, when data is transferred in the block transfer mode, a part of the transfer data is transferred by the address bus.
REFERENCES:
patent: 58-169226 (1983-10-01), None
patent: 61-84655 (1986-08-01), None
patent: 6459448 (1989-03-01), None
patent: 2012358 (1990-01-01), None
patent: 2230454 (1990-09-01), None
patent: 3137755 (1991-06-01), None
patent: 7334456 (1995-12-01), None
Hirabayashi Akira
Ura Tamaki
Dharia Rupal
I-O Data Device, Inc.
Pillsbury & Winthrop LLP
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