Static information storage and retrieval – Read/write circuit – Testing
Patent
1998-12-23
2000-08-01
Nelms, David
Static information storage and retrieval
Read/write circuit
Testing
36518909, G11C 700
Patent
active
060976462
ABSTRACT:
A method for the testing of the retention time of a piece of information in a dynamic memory cell includes increasing the leakages of current in this cell to accelerate the loss of information. Under these testing conditions, a reduced retention time is controlled to approach the true retention time obtained under conditions of normal reading. This method makes it possible to reduce the time taken to test the retention time of the dynamic memories while at the same time being very reliable.
REFERENCES:
patent: 5568435 (1996-10-01), Marr
patent: 5570317 (1996-10-01), Rosen et al.
patent: 5748544 (1998-05-01), Hashimoto
Galanthay Theodore E.
Nelms David
STMicroelectronics S.A.
Tran M.
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