Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-07-22
2008-07-22
Whitmore, Stacy A (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
07404172
ABSTRACT:
The present invention is a systematic and data-driven-decomposition (DDD) method and apparatus for use in VLSI synthesis. The invention decomposes a high level program circuit description into a collection of small and highly concurrent modules that can be implemented directly into transistor networks. This enables an automatic implementation of a decomposition process currently done by hand. Unlike prior art syntax-based decompositions, the method of the present invention examines data dependencies in the process' computation, and then attempts to eliminate unnecessary synchronization in the system. In one embodiment, the method comprises: a conversion to convert the input program into an intermediate Dynamic Single Assignment (DSA) form, a projection process to decompose the intermediate DSA into smaller concurrent processes, and a clustering process that optimally groups small concurrent processes to make up the final decomposition. Another embodiment is a decomposition, projection, and clustering tool implemented in computer program codes.
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Shafiaabadi, M. H. et al., New Methods to Reduce Energy and Area in Asynchronous Circuits Following the Decomposition Stage, Department of Computer Eng. and IT, Amirkarbir University of Technology, 2004.
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Martin Alain J.
Nystroem Mika
Wong Catherine G.
California Institute of Technology
DLA Piper (US) LLP
Harriman, II J. D.
Whitmore Stacy A
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