Method for the selective formation of a silicide on a wafer...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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C438S279000, C438S286000, C438S655000

Reexamination Certificate

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07022595

ABSTRACT:
A method for the selective formation of a suicide on a slice of semiconductor material that comprises exposed regions to be silicided and exposed regions not to be silicided, comprising the following steps: a) forming a resist thin mask on top of the regions not to be silicided; b) implanting ions wafer-scale through said mask so as to form beneath the resist layer an implantation residue layers using the resist layer; c) removing the resist layer; d) depositing conformally a metal layer on the wafer; e) performing rapid heat treatment so as to form a silicide by siliciding the metal deposited at step d); and f) removing the metal that has not reacted to the heat treatment of step e).

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patent: WO 00/36634 (2002-06-01), None

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