Method for the prevention of misfit dislocation in silicon wafer

Details Method for the prevention of misfit dislocation in silicon wafer Method for the prevention of misfit dislocation in silicon wafer

1995-09-28

1998-09-01

Chaudhari, Chandra

Semiconductor device manufacturing: process

Introduction of conductivity modifying dopant into...

Ion implantation of dopant into semiconductor region

438938, H01L 21425

Patent

active

058010858

ABSTRACT:
There are disclosed methods for the prevention of misfit dislocation in a silicon wafer and the silicon wafer structure manufactured thereby. A method according to an embodiment comprises the steps of: depositing a blanket silicon oxide or silicon nitride on silicon wafer in a chemical vapor deposition process; selectively etching the silicon oxide or silicon nitride, to form a silicon oxide or silicon nitride pattern which is of close shape; and injecting the silicon wafer with impurities at a high density with the CVD silicon oxide or silicon nitride pattern serving as a mask, so as to form an impurity-blocked region is formed under the CVD silicon oxide or silicon nitride through the action of the mask. The misfit dislocation is propagated mainly from the edge of wafer and an impurity-blocked region can prevent the propagation. The propagation energy is virtually based on the tensile stress attributable to the implantation of impurity. Formation of an impurity-blocked region in the wafer barricades the propagation of misfit dislocation because the propagation energy is not supplied in this region. Thus, the area of the silicon wafer enclosed by the impurity-blocked region has no misfit dislocation. By such conception, a silicon wafer free of misfit dislocation can be manufactured. Therefore, there are improved in electrical and mechanical properties in electrical devices, X-ray masks and micromachines as well as in surface roughness.

REFERENCES:
patent: 4137103 (1979-01-01), Mader et al.
patent: 4786614 (1988-11-01), Cogan

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