Method for the manufacture of bipolar transistor structures with

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430316, 430317, 430319, 430330, 148 15, 156643, 156653, 1566611, G03C 500, B44C 122

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045813191

ABSTRACT:
A method for the manufacture of bipolar transistor structures with self-adjusted emitter and base regions wherein the emitter and base regions are generated by an out-diffusion from doped polysilicon layers. Dry etching processes which produce vertical etching profiles are employed for structuring the SiO.sub.2 and polysilicon layers. The employment of additional oxidation processes for broadening the lateral edge insulation (see arrow 9) during the manufacture of the bipolar transistor structures enables self-adjusted emitter-base structures with high reproducibility in addition to advantages with respect to the electrical parameters. The method is employed for the manufacture of VLSI circuits in bipolar technology.

REFERENCES:
patent: 4157269 (1979-06-01), Ning et al.
patent: 4459325 (1984-07-01), Nozawa et al.
patent: 4483726 (1984-11-01), Isaac et al.
patent: 4492008 (1985-01-01), Anantha et al.
IEEE Transactions on Electron Devices, vol. ED-28, No. 9, Sep. 1981, "Self-Aligned Bipolar Transistors for High-Performance and Low-Power-Delay VLSI", by Tak H. Ning et al, pp. 1010-1013.

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