Method for the controlled formation of voids in doped glass diel

Details Method for the controlled formation of voids in doped glass diel Method for the controlled formation of voids in doped glass diel

1995-11-29

1998-02-17

Chaudhari, Chandra

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

438632, H01L 21469

Patent

active

057190844

ABSTRACT:
A method is provided for the controlled formation of voids in integrated circuit doped glass dielectric films. The film can be formed of borophosphosilica glass (BPSG) or other types of doped glass. The method involves the steps of providing a substrate on which conductors are formed, depositing a first layer of doped glass to a thickness in a predetermined ratio to the size of the space between conductors, reflowing the first doped glass layer, applying one or more additional doped glass layers to make up for any shortfall in desired total doped glass thickness, and performing a high temperature densification to smooth each additional layer. The method provides for increased integrated circuit speed by controlled formation of voids which have a low dielectric constant and therefore reduce capacitance between adjacent conductors. The method can be performed using existing doped glass deposition and reflow equipment.

REFERENCES:
patent: 4571819 (1986-02-01), Rogers et al.
patent: 5004704 (1991-04-01), Maeda et al.
patent: 5166101 (1992-11-01), Lee et al.
patent: 5278103 (1994-01-01), Mallon et al.
Stanley Wolf, PH.D, "Silicon Processing For The VLSI Era", 1986, pp. 189-196.

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