Method for the allocation of memory in a buffer memory

Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral monitoring

Reexamination Certificate

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Details

C710S008000, C710S036000, C710S052000

Reexamination Certificate

active

07979599

ABSTRACT:
A method for allocation of a buffer memory with three buffers of a module having a processing unit and a bus connection is provided. The module sends or receives data via the bus connection and uses the processing unit to generate data for transmission via the bus connection and process data received via the bus connection. The bus connection and the processing unit function as a producer or consumer in a communication relationship established via the buffer memory. Each buffer assumes one of four statuses—“input area local”, “local”, “input area external” and “external”. Either the bus connection or the processing unit attempt to reserve one of the three buffers by a strategy: when one of the three buffers is already allocated, this buffer is used. Otherwise a buffer with the status “input area external” or “input area local” is used and the status “external” or “local” is assigned.

REFERENCES:
patent: 2005/0055406 (2005-03-01), Singhai et al.
patent: 10048747 (2002-05-01), None
patent: 0843843 (1999-11-01), None
patent: WO 2008008662 (2008-01-01), None
O'Kane, Stephan, Design and Implementation of a Shared Buffer Architecture For Fixed and Variable Sized Packets, 2005, ieee.org [online, accessed on Dec. 17, 2010], URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1517654.

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