Method for testing semiconductor memory device

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S200000, C714S718000

Reexamination Certificate

active

07813195

ABSTRACT:
A method for testing a semiconductor memory device is provided. The semiconductor memory device includes a plurality of word lines, a plurality of bit lines, and a plurality of memory cells. Each word line is controlled by a corresponding control line and a corresponding driving line. The method includes selecting a plurality of word lines controlled by one driving line; enabling a plurality of control lines respectively corresponding to the selected word lines; actuating one of the selected word lines; and adding a disturbing signal on the actuated word line and measuring signals on the plurality of bit lines.

REFERENCES:
patent: 5590079 (1996-12-01), Lee et al.
patent: 5638331 (1997-06-01), Cha et al.
patent: 6574159 (2003-06-01), Ohbayashi et al.
patent: 6658609 (2003-12-01), Saito et al.
patent: 6691252 (2004-02-01), Hughes et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for testing semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for testing semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for testing semiconductor memory device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4169739

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.