Method for testing semiconductor components

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C324S765010

Reexamination Certificate

active

06208157

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to semiconductor manufacture, and more particularly to an improved system and method for testing semiconductor components including bare dice and chip scale packages.
BACKGROUND OF THE INVENTION
Semiconductor components, such as unpackaged dice and chip scale packages, must be burned-in and tested prior to use in electronic equipment. One test procedure involves placing one or more semiconductor components in a test carrier. The carrier provides a container for handling and electrically connecting the components to a testing apparatus. The testing apparatus can include test circuitry adapted to transmit and analyze test signals from the components held within the carrier. The carrier and testing apparatus form a test system.
One requirement of carriers for testing semiconductor components, is the ability to make temporary electrical connections with the components. The temporary electrical connections permit test signals to be transmitted to the integrated circuits contained on the components. One type of carrier includes an interconnect adapted to make temporary electrical connections with contacts on the components. The contacts on unpackaged dice are typically flat or bumped bond pads formed on faces of the dice. The contacts on chip scale packages are typically solder bumps formed on substrates bonded to the faces of the dice.
These contacts on the components can be in the form of small, densely-packed members. For example, chip scale packages can include a hundred or more solder bumps having a diameter and spacing of several mils or less. Unpackaged dice can include bond pads having a width and spacing of several mils or less. The interconnect of the carrier must be able to make separate electrical connections to each contact without shorting or excessively damaging the contact.
The carrier must also include external contacts adapted to make electrical connections with the test apparatus. These externals contacts on the carrier must have a size and density corresponding to the size and density of the contacts on the components under test. In addition, the external contacts must be able to perform reliably in a production environment over an extended period of time.
Another consideration is the interface of the external contacts with the test apparatus. The test apparatus must be able to efficiently handle and electrically connect to a large number of individual carriers. The physical and electrical interface of the carriers and the test apparatus affects the performance of the test system to a large degree.
The present invention is directed to a system including a carrier with a dense array of external contacts and a socket adapted to physically and electrically connect to the external contacts.
SUMMARY OF THE INVENTION
In accordance with the present invention, an improved system and method for testing semiconductor components are provided. The system includes carriers for holding the components, and a test apparatus adapted to transmit test signals to the carriers and to analyze response signals from the components under test. The test apparatus includes a test board, and a plurality of separate sockets mounted to the test board, in electrical communication with test circuitry. Each socket is configured to physically and electrically engage a single carrier. The sockets include rows of electrical connectors for electrically contacting contacts on the carriers, and camming members for manipulating the electrical connectors to allow insertion and removal of the carriers. The electrical connectors and camming members allow the carriers to be inserted into the sockets with a zero insertion force.
The carriers include bases for holding multiple components, and multiple interconnects each adapted to establish temporary electrical communication with an individual component. The carrier bases also include the contacts which electrically contact the electrical connectors on the sockets mounted to the test board. The electrical interface between the contacts on the carrier bases, and the interconnects mounted to the carrier bases, can be wire bonding, flex circuit bonding or mechanical-electrical connectors.
In addition to the bases and interconnects, the carriers also include a force applying mechanism for biasing the components against the interconnects. The force applying mechanism include bridge clamps attachable to the carrier bases and metal or elastomeric spring members. In an illustrative embodiment the bases comprise ceramic with plated external contacts adapted to electrically engage electrical connectors on sockets mounted to the test board.
In accordance with the method of the invention the sockets can remain electrically connected to the test board. In addition, the carrier bases can remain electrically connected to the sockets with the interconnects thereon. During a test procedure, the components can be optically or mechanically aligned with the interconnects, and placed in physical and electrical contact therewith. Test signals can then be transmitted through the test board, sockets, carrier bases and interconnects to the components. As long as the same types of components are being tested, the carrier bases and interconnects can remain mounted to the same sockets on the test board. However, the bases and interconnects can also be easily removed from the sockets, and different bases and interconnects can be substituted for testing other types of components. Accordingly the configurations of the interconnects and carrier bases can be customized for a particular type of component, while the test board and socket configurations remain the same.


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