Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Patent
1997-12-24
2000-10-03
Cabeca, John W.
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
711148, 711153, 711154, 711152, 709213, 709214, 709215, 709216, 707 7, 707 3, 707 4, 707 5, G06F 1200, G06F 700, G06F 15167
Patent
active
061287083
ABSTRACT:
The method of the present invention provides a procedure for testing shared-memory multi-processor (SMMP) performance by formulating and modifying a given memory contention matrix (MCM), which is generated by collecting traces of memory addresses accessed by so-called subcalls in an SMMPCC. A subcall pair contending for at least one shared memory access address enters a "1" at the respective matrix element. For subcall pairs not sharing any memory address a ".O slashed." is entered.
REFERENCES:
T. Drwiega, Shared Memory Contention and its Impact on Multi-Processor Call Control Throughput.
Chinthamani Sundaram
Drwiega Tadeusz
Fitzpatrick Gordon James
Cabeca John W.
McLean Kimberly
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