Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-06-23
2008-08-12
Beausoliel, Jr., Robert W (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S041000, C714S042000, C714S703000, C714S800000
Reexamination Certificate
active
07412620
ABSTRACT:
A method, apparatus, and computer program product are disclosed for testing a data processing system's ability to recover from cache directory errors. A directory entry is stored into a cache directory. The directory entry includes an address tag and directory parity that is associated with that address tag. A cache entry is stored into a cache that is accessed using the cache directory. The cache entry includes information and cache parity that is associated with that information. The directory parity is altered to imply bad parity. The bad parity implies that the address tag that is associated with this parity is invalid. The information included in the cache entry is altered to be incorrect information. However, although the information is now incorrect, the cache parity continues to imply good parity which implies that the data is good. This good parity implies that the information that is associated with the parity is valid, even though it is not. The data processing system's ability to recover from errors is tested using the directory entry and the cache entry.
REFERENCES:
patent: 5872910 (1999-02-01), Kuslak et al.
patent: 6539503 (2003-03-01), Walker
patent: 6751756 (2004-06-01), Hartnett et al.
patent: 2007/0271485 (2007-11-01), Weiberle et al.
Beausoliel, Jr. Robert W
Ehne Charles
El-Jarrah Houda
Gerhardt Diana R.
International Business Machines - Corporation
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