Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2011-06-28
2011-06-28
Chung, Phung M (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S718000, C714S719000
Reexamination Certificate
active
07971114
ABSTRACT:
A method for testing a random-access memory (RAM) includes six tests. The first test is performed by performing a write and read test to storage locations of the RAM. The second test is performed by testing walking 1's across each data bus of the RAM. The third test is performed by testing walking 0's across the data bus of the RAM. The fourth test is performed by testing walking 1's across each address bus of the RAM. The fifth test is performed by testing walking 0's across the address bus bit of the RAM. The sixth test is performed by performing a write and read test to random blocks in the storage locations of the RAM.
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Hong Xue-Wen
Tang Chiang-Chung
Tong Mo-Ying
Chew Raymond J.
Chung Phung M
Hon Hai Precision Industry Co. Ltd.
Hong Fu Jin Precision Industry ( ShenZhen) Co., Ltd.
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