Method for termination of signal lines with discrete biased...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

Reexamination Certificate

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C326S086000, C326S090000, C333S02200F, C327S309000, C327S310000

Reexamination Certificate

active

06400179

ABSTRACT:

BACKGROUND
The disclosures herein relate generally to methods of damping undershoot of signals and, more particularly, to a method of accomplishing such damping using discrete biased diodes.
Motherboards with buses of increasing speed and chipsets of increasing complexity are constantly being developed and shipped. Often, issues occur that cannot easily be fixed with routing changes or silicon changes in the chipsets and still meet the required ship dates. For example, certain problems exist that are caused by fast and massive switching of large buses (such as memory buses), which result in glitches as energy is reflected on the line. Damping of the undershoot of some signals prevents reflection of the energy into positive glitches that can cause false signals or data corruption on these buses. Discrete solutions often cannot function fast enough to affect signals at these speeds, usually because of factors such as parasitic capacitance inherent in the packaging of such parts. Integrated silicon solutions are not always available, often because of lack of time to implement them or because the necessary parts are of an industry standard.
It has been known to use diodes to clamp signal lines to a fixed plane, either ground or voltage, to shunt off glitches into the plane. If one has the opportunity to include such diodes directly on an integrated circuit (“IC”) chip itself, this technique is generally adequate, because the diodes used can be very small, low capacitance devices and therefore have a sufficiently fast “turn-on” time (i.e., the time it takes to overcome the capacitance of a diode) to shunt small, fast glitches before they are gone. However, in many situations, it is not possible to include such clamping diodes on the chip. In these situations, the diodes must be placed on the motherboard and the diodes themselves are necessarily larger, higher capacitance devices and therefore have much slower turn-on times. More often than not, the glitch that the diode is supposed to shunt comes and goes before the diode can even turn on to shunt it.
Therefore, what is needed is a method of shunting signal glitches using conventional, discrete clamping diodes.
SUMMARY
One embodiment, accordingly, uses a variable voltage supply to clamp a diode used to shunt signal glitches. Clamping the diode to a variable voltage supply enables forward-biasing of the diode, thereby preparing the diode for the glitch and effectively reducing the diode's turn-on time. The voltage of the variable voltage supply is determined by the size of the clamping diode used and the magnitude of the glitch it is designed to shunt.
In another embodiment, the variable voltage supply is a temperature compensated voltage supply, such that as the temperature, and hence, the forwardvoltage drop, of the diode changes, the value of the variable voltage supply also changes accordingly.
A principal advantage of the embodiments is that large, inexpensive and/or readily available diodes can be used to shunt small signal glitches by adjusting the voltage at which such diodes turn on. Another advantage of one of the embodiments is that it compensates for changes in temperature, such that the operation of the diode in shunting signal glitches is unaffected thereby.


REFERENCES:
patent: 5136187 (1992-08-01), Ceccherelli et al.
patent: 5241643 (1993-08-01), Durkin et al.
patent: 5646552 (1997-07-01), Ota
patent: 5686872 (1997-11-01), Fried et al.
Systems Architecture, Stephen D. Burd, University of New Mexico, ITP 1996.

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