Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-01-18
2009-06-30
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S620000, C438S618000, C438S508000
Reexamination Certificate
active
07553755
ABSTRACT:
A method for symmetric deposition of metal layer over a metal layer registration key comprises using MOCVD to form the metal layer. Once the symmetric metal layer is formed, a metal layer registration key can be accurately detected and the metal layer registration key overlay shift can be improved.
REFERENCES:
patent: 6066569 (2000-05-01), Tobben
patent: 6365502 (2002-04-01), Paranjpe et al.
patent: 6368954 (2002-04-01), Lopatin et al.
patent: 6468907 (2002-10-01), Pyo
patent: 6531327 (2003-03-01), Kanamaru et al.
patent: 2002/0025690 (2002-02-01), Kawahara et al.
patent: 2002/0102838 (2002-08-01), Paranjpe et al.
patent: 2005/0006761 (2005-01-01), Chen
Dae-Joung Kim, et al., “Wafer Induced Reading Error in Metal Sputtering Process”, pp. 667-671, Proceedings of SPIE vol. 4344.
Christopher J. Gould, Yuanting Cui, Sean Louks; Advanced Process Control Applied to Metal Layer Overlay Process; “Infineon Technologies, 6000 Technology Blvd., Sandston, VA 23150”; Data Analysis and Modeling for Process Control; edited by Kenneth W. Tobin, Jr.; SPIE vol. 5378 (SPIE, Bellingham, WA, 2004).
Se-Jin Park, Hong-Lae Kim, Yong-Suk Lee, Weon-Sik Yang; CMP and Self-Shadowing Effect of Overlay Mark in Metal Sputtering Process; “Dongbu Electronics Co., 474-1 Sangwoo-ri, Kamgok-myun, Umsung-kun, Chungbuk, 369-852, Korea”; Metrology, Inspection and Process Control for Microlithography XVII, Daniel J. Herr, Editor; Proceedings of SPIE vol. 5038 (2003).
Wenzhan Zhou, Zhiqiang Li, Luke Ng, Teng Hwee Ng, Hui Kow Lim; “Fab3, Mask Module, Chartered Semiconductor Mfg. Ltd., 60 Woodlands Industrial Park D, St. 2, Singapore 738406”; Metrology, Inspection and Process Control for Microlithography XVII, Daniel J. Herr, Editor; Proceedings of SPIE vol. 5038 (2003).
Chen Kuang-Chao
Hsieh Sheng-Hui
Huang Chi-Tung
Yang Ling-Wuu
Baker & McKenzie LLP
Le Dung A.
Macronix International Co. Ltd.
LandOfFree
Method for symmetric deposition of metal layer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for symmetric deposition of metal layer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for symmetric deposition of metal layer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4140349