Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
1999-04-05
2001-04-24
Kunemund, Robert (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S691000, C438S692000, C216S089000, C216S092000
Reexamination Certificate
active
06221774
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to surface treatment of semiconductor substrates, and more particularly to a polishing process and system for preparing a surface of a substrate for electronic device fabrication.
One of the steps in a typical integrated circuit (IC) fabrication sequence is the preparation of the surface of the substrate for subsequent processing. The starting material for IC fabrication is often a “bulk” silicon wafer that is cut from a single-crystal silicon ingot with an abrasive saw. The wafer is typically lapped to remove saw marks and mechanical damage from the surface of the wafer, and then highly polished in several steps.
Polishing processes typically use a polishing compound, or slurry, and a polishing pad. The type of polishing process used often depends on the degree of surface finish that is desired. As the complexity of ICs increases, and the feature size, also known as the critical dimension, decreases, the preparation of the surface of the substrate becomes increasingly important.
Surface defects or contamination can cause device failure. As devices get smaller, a smaller defect may produce such a failure. Additionally, as ICs become more complex, the size of each IC die on the wafer becomes larger. A larger die has a greater probability of including a surface defect, and hence device failure, within the boundary of the die. Thus it is important to produce a substrate surface that is reasonably free of defects or contamination that might cause a device failure to achieve acceptable manufacturing yields.
Additional problems concerning surface finish arise from the new methods and techniques used in semiconductor wafer fabrication. Chemical-mechanical planarization (CMP) is an example of a technique that has gained wider application in IC fabrication as multi-layer metallization has increased. CMP processes may be performed on a variety of materials, including silicon oxide or other glass-like materials, polysilicon layers, or metal layers.
Many IC fabrication processes create ridges or holes on the surface of the wafer. Frequently, a conformal layer, such as chemical-vapor-deposition (CVD) silicon oxide, is deposited that often partially preserves the topography of these ridges and holes. In a typical CMP process, a mildly abrasive slurry is rubbed against the surface of a process wafer with a polishing pad to smooth the deposited layer into a flat surface. The slurry may have chemical components that help remove the material of the deposited layer in conjunction with the mechanical action of the slurry. Unfortunately, abrasive particles in the CMP process can contaminate the surface of the wafer if the particles are not removed.
A variety of methods and apparatus have been developed to remove particles from the surface of a wafer after a CMP process, such as brush scrubbers. One type of brush scrubber uses a special porous sponge-brush made of polyvinyl alcohol (PVA) as the brushing element. The PVA material is soft and scrubs particles from the surface of the wafer without removing or damaging the surface material.
While CMP is used to planarize fairly lumpy surfaces, other surfaces are relatively planar, but may be improved by smoothing. Such a surface is formed during a thin film transfer process. In a thin film transfer process, a thin film of material is separated from a donor, or source, substrate and attaches, or bonds, the thin film to a backing substrate, also known as a target substrate or “handle”. Some thin film transfer applications attach a thin film of one material, such as single-crystal silicon, to a backing substrate of another material, such as silicon oxide, while other applications attach a thin film to a backing substrate of the same material. A variety of methods have been developed to separate a thin film from the donor substrate, but once the thin film has been attached to the backing substrate it is generally desirable to finish the surface of the thin film that was separated from the donor in preparation for device fabrication, and often to re-finish the surface of the donor wafer, as well, to prepare it for another thin film transfer.
While the methods developed for polishing single-crystal bulk wafers may be used in some instances to prepare the surface of transferred thin films and donor wafers, such methods may not be the most desirable. One disadvantage of using a wafer-polisher-type system is that such systems are relatively expensive, and also have a relatively large “footprint” that consumes a lot of floor space. Such systems also typically require mounting the wafer or wafers to a platen, often using a wax, which is time consuming and labor intensive. Such systems also generate a large quantity of particulates, and must be well isolated from the clean rooms where other steps in the fabrication process are performed. While CMP systems have been developed that do not attach the wafers to a platen with melted wax, wafers are typically attached to a platen with a transfer film.
Yet another disadvantage of using a wafer-polisher-type system to prepare the surface of a transferred thin film is the amount of material such a system might remove. Some thin film transfer processes result in a very thin film, perhaps
15
microns thick or less, being bonded to the backing wafer. Wafer-polishers also create a risk of scratching the surface of a wafer with a piece of agglomerated slurry or other particle. While some bulk wafers may be salvaged by removing additional material in order to polish through the scratch, this option might not be available when preparing the surface of a transferred thin film.
Therefore, an alternative wafer surfacing technique that eliminates or reduces the problems and issues enumerated above for conventional wafer surfacing methods is desirable.
SUMMARY OF THE INVENTION
The present invention provides a method and apparatus for finishing a surface of a semiconductor wafer. In one embodiment, an essentially cylindrical polishing pad is attached to a roller that rotates about an axis essentially parallel to a surface of a wafer. The relatively smooth surface of the wafer allows for smoothing, or touch-polishing, of the wafer with or without the use of an abrasive slurry. The initial surface smoothness of the wafer may arise from a thin-film transfer process, an epitaxial process, a pre-polishing process, or the like. The polishing pad can be permeable to allow water or other fluid to aid in the surface finishing process and remove by-products of the process. In one embodiment the polishing pad is perforated to improve the fluid flow, as the permeability of the polishing pad is generally less than that of a PVA sponge brush, which may have been designed for use with the roller. The substrate may be moved relative to the roller by rotating the substrate beneath the roller, by moving the wafer in a linear fashion beneath the roller, or in other ways or combinations of relative motion. A pressure suitable for the surface roughness, desired surface finish, pad material, and wafer material is applied between the polishing pad and the surface of the wafer. Differential surface finishing is achieved by tilting the roller with respect to the plane of the wafer, for example, to process the edge region of the wafer differentially from the center of the wafer surface.
These and other embodiments of the present invention, as well as some of its advantages and features are described in more detail in conjunction with the text below and attached figures.
REFERENCES:
patent: 5374564 (1994-12-01), Bruel
patent: 5868610 (1999-02-01), Nishio
patent: 5967881 (1999-10-01), Tucker
patent: 6013563 (2000-01-01), Henley et al.
Kunemund Robert
Silicon Genesis Corporation
Townsend and Townsend / and Crew LLP
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