Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-05-11
2003-03-04
Thomas, Tom (Department: 2811)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06530067
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The invention relates to a method for subdividing data of a layout according to the image data amount and geometry data amount.
2. Related Art
Along with the fast development in computer and network technology, to design various kinds of layout utilizing a network -based CAD (computer-aided design) system has become more and more popular. Take the IC design for example, to design the circuit layout in an IC utilizing a network -based CAD system not only reduces the design time required, but also speeds up the debug procedure. So, the overall layout-design efficiency can be improved.
Another advantage of utilizing a network -based CAD system is that when the layout becomes more and more complicated, a network -based CAD system allows multiple design engineers to design and modify a layout at the same time. Take the mask pattern layout for example, the number and data amount of a state-of-the-art mask pattern layouts has become larger as the structure of the modem VLSI becomes more and more complicated. The size of the file of a set of mask pattern layouts usually exceeds several megabytes. Such a huge and complex layout set must take multiple mask design engineers to design together. Utilizing a network-based CAD system, the data of the layouts can be stored in a database server, the mask-design application software can be stored in an application server, and the design engineers can modify the layouts at the same time using their computers connected with the database server and the application server. This architecture is known as a multi-tier network architecture.
However, because the geometric data amount of a layout is large, transmitting geometric data via network takes a lot of time and bandwidth. To solve this problem, in the prior art, the layout is subdivided into several portions evenly, for example, 4 or 16 regions. When a design engineer sends a request to the server, instead of transmitting all geometric data of a layout, the server only transmits image data of the region requested to the design engineer. This method ensures that each time the engineer sends a request to view an image of a region, only the image data of the region is transmitted, and the data amount transmitted on the network is the same (because all regions are of same image size).
However, since the above-mentioned method does not subdivide the layout according to its characteristics, it may still waste unnecessary transmission time. For example, one have ordinary skill in the art knows that one characteristic of an IC layout, a PCB layout or a mask pattern layout is that the entity density is not usually very even. If the layout is subdivided evenly, it is possible that the image data amount is much larger than the geometric data amount of a region. Under this circumstance, after spending time transmitting the image data, the engineer sees only few entities. This reduces both the designing and network-transmission efficiency.
SUMMARY OF THE INVENTION
It is an objective of the invention to provide a method for subdividing data of a layout, which can subdivide the layout according to its characteristics.
It is another objective of the invention to provide a method for subdividing data of a layout, which considers the geometry data amount and the image data amount of a layout when subdividing the same.
Pursuant to the above objectives, the method for subdividing data of a layout according to the invention firstly subdivides the layout into a plurality of to-be-processed regions so that the number of entities of each to-be-processed region is smaller then a predetermined number, and calculating an image data amount and an geometric data amount of each to-be-processed region. Then, the method selects a to-be-processed region from the plurality of to-be-processed regions as a selected region, and compares the image data amount of the selected region with the geometry data amount of the selected region. When the image data amount of the selected region is larger than the geometry data amount of the selected region, the method merges the selected region with its neighboring to-be-processed region to obtain a merged region and set the merged result as a selected region. When the image data amount of the selected region is smaller than the geometry data amount of the selected region, the method sets the selected region as a subdivision of the layout.
REFERENCES:
patent: 4890238 (1989-12-01), Klein et al.
patent: 5907494 (1999-05-01), Dangelo et al.
patent: 6170080 (2001-01-01), Ginetti et al.
patent: 6295633 (2001-09-01), Murakawa
patent: 2002/0124231 (2002-09-01), Teig et al.
AnaGlobe Technology, Inc.
Owens Douglas W.
Thomas Tom
LandOfFree
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