Method for speeding up page table address update on virtual...

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C711S212000, C711S220000

Reexamination Certificate

active

08086823

ABSTRACT:
A method is provided which eliminates redundancy from the shadow PT operation performed by the virtual machine monitor (VMM) when the guest operating system running on a virtual machine updates a guest page table (PT) address. The VMM associates a plurality of shadow PTs with guest PTs and allocates their relation in memory. When it detects the update of a guest PT address, the VMM searches for a shadow PT corresponding to the updated guest PT. If the associated shadow PT exists, the VMM omits rewriting the shadow PT and registers the address of the shadow PT with the central processing unit (CPU). If the associated shadow PT does not exist, the VMM allocates a memory, creates a shadow PT, registers an address of the created shadow PT with the CPU, and records a relationship between the updated guest PT and the generated shadow PT.

REFERENCES:
patent: 4835734 (1989-05-01), Kodaira et al.
patent: 5390309 (1995-02-01), Onodera
patent: 6119219 (2000-09-01), Webb et al.
patent: 6606697 (2003-08-01), Kawahara
patent: 6996698 (2006-02-01), Slegel et al.
patent: 7020761 (2006-03-01), Siegel et al.
patent: 7225287 (2007-05-01), Wooten
patent: 7284100 (2007-10-01), Slegel et al.
patent: 7299337 (2007-11-01), Traut et al.
patent: 2002/0082824 (2002-06-01), Neiger
patent: 2004/0230749 (2004-11-01), Slegel et al.
patent: 2004/0230976 (2004-11-01), Slegel et al.
“Z/Architecture Principles of Operations”, IBM Publication No. SA22-7832-00, Dec. 2000, Chapter 3 pp. 1-40, Chapter 10, pp. 18-19 and 29-30.
Office Action in Japanese Application No. 2006-003143 mailed Jun. 21, 2011 (with English translation).
Tadashi Takeuchi, OS Debugging Method Using a Lightweight Virtual Machine Monitor, Information Processing Society of Japan (IPSJ), Jul. 15, 2005, vol. 46, No. 7, pp. 1735-1751 (with translation of relevant portions).

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for speeding up page table address update on virtual... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for speeding up page table address update on virtual..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for speeding up page table address update on virtual... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4257336

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.