Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2010-04-23
2011-12-27
Elmore, Reba I (Department: 2189)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S212000, C711S220000
Reexamination Certificate
active
08086823
ABSTRACT:
A method is provided which eliminates redundancy from the shadow PT operation performed by the virtual machine monitor (VMM) when the guest operating system running on a virtual machine updates a guest page table (PT) address. The VMM associates a plurality of shadow PTs with guest PTs and allocates their relation in memory. When it detects the update of a guest PT address, the VMM searches for a shadow PT corresponding to the updated guest PT. If the associated shadow PT exists, the VMM omits rewriting the shadow PT and registers the address of the shadow PT with the central processing unit (CPU). If the associated shadow PT does not exist, the VMM allocates a memory, creates a shadow PT, registers an address of the created shadow PT with the CPU, and records a relationship between the updated guest PT and the generated shadow PT.
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Hattori Naoya
Moriki Toshiomi
Tsushima Yuji
Brundidge & Stanger, P.C.
Elmore Reba I
Hitachi , Ltd.
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