Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2006-03-07
2006-03-07
Nguyen, VanThu (Department: 2824)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S230020, C365S230040, C365S230060
Reexamination Certificate
active
07009895
ABSTRACT:
The method described uses a Skip-Over technique which requires a set of muxes at the input and output of a block that is to be repaired. The improved method of implementing I/O redundancy control logic has a minimal impact to both chip area and chip wire tracks. To overcome problems of required real estate usage on a chip that was undesirable enables use of odd and even decoder outputs that can share a single wire track, the same wire being utilizable for both odd and even decoder outputs. In order to implement the decode and carry function as a centralized function, there arises a requirement that logically adjacent decode circuits (decoders connected by a carry signal) should be physically close together to minimize the overhead of the carry wiring. If the decode structure and the mux structure are arranged orthogonal to each other, then each decoder output would require a wire track. The described method however, allows odd and even decoder outputs to share the same wire track. This reduces the number of wire tracks from 1 track per I/O to 1 track per 2 I/Os.
REFERENCES:
patent: 6373775 (2002-04-01), Ishikawa
patent: 6584023 (2003-06-01), Bunce et al.
Bunce Paul A.
Davis John D.
Knips Thomas J.
Plass Donald W.
Augspurger Lynn L.
Nguyen Van-Thu
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