Method for simultaneously manufacturing poly gate and polycide g

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

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438584, 438585, 438614, 438622, 438628, H01L 2128

Patent

active

060572183

ABSTRACT:
The present invention discloses a method for simultaneously manufacturing a poly gate and a polycide gate which requires only one gate oxide layer deposition and one polysilicon layer deposition steps by incorporating a protective layer, primarily an oxide layer, which acts as a mask of a silicide. The present invention not only simplifies the process but also avoids a residual spacer in the gate. The advantages also includes widening the process window, controlling the gate channel and avoiding the gate top loss.

REFERENCES:
patent: 5604157 (1997-02-01), Dai et al.

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