Method for simulation of negative bias and temperature...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

07600204

ABSTRACT:
An apparatus and method to accurately simulate negative bias and temperature instability (NBTI) and its effect. According to a first simulation method, a simulation netlist is automatically scanned for any P-type devices that are in a conductive state after application of an initial condition. Each conductive P-type device is automatically replaced with an NBTI device model and a first simulation cycle is executed. After the first cycle, each conductive P-type device is again replaced with an NBTI model and a second simulation cycle is executed. In a second simulation method, only those P-type devices transitioning from a non-conductive state to a conductive state are automatically replaced with an NBTI model prior to each half cycle of the second simulation method. The first simulation method provides robustness, while the second simulation method provides worst case verification in less time as compared to the first simulation method.

REFERENCES:
patent: 6321363 (2001-11-01), Huang et al.
patent: 2003/0233624 (2003-12-01), Reddy et al.
patent: 2005/0138581 (2005-06-01), Usui
patent: 2006/0190859 (2006-08-01), Cui et al.
patent: 2006/0282804 (2006-12-01), Ang et al.

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