Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-07-17
1999-08-03
Luu, Le Hien
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
39520044, 39520048, 711147, 711148, G06F 1300
Patent
active
059335980
ABSTRACT:
In a distributed shared memory system, workstations are connected to each other by a network. Each workstation includes a processor, a memory having addresses, and an input/output interface to interconnect the workstations. A software implemented method enables data sharing between the workstations using variable sized quantities of data. A set of the addresses of the memories are designated as virtual shared addresses to store shared data. A portion of the virtual shared addresses are allocated to store a shared data structure as one or more blocks. The shared data structure is accessible by programs executing in any of the processors. The size of a particular allocated block can vary for different shared data structures. Each block includes an integer number of lines, and each line includes a predetermined number of bytes of shared data. Access information of a particular block is stored in the memory of a home one of the workstations. The access information includes the size of the particular block and an identity of workstations having a copy of the block.
REFERENCES:
patent: 5528761 (1996-06-01), Ooba et al.
patent: 5649102 (1997-07-01), Yamauchi et al.
Jim Handy, "The Cache Memory Book", pp. 176-180, 1993.
"Fine-grain Access Control for Distributed Shared Memory," Schoinas et al., Computer Sciences Dept., University of Wisconsin-Madison, ACM "ASPLOS VI," Oct. 1994.
Gharachorloo Kourosh
Scales Daniel J.
Digital Equipment Corporation
Luu Le Hien
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