Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing
Reexamination Certificate
2006-02-07
2006-02-07
Nguyen, Tan T. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Flip-flop used for sensing
C365S207000
Reexamination Certificate
active
06996018
ABSTRACT:
A semiconductor memory device having a uniform bit line sensing margin time independent on an external voltage variation, includes: a memory cell coupled to a bit line and a word line; an amplifier for amplifying an electric potential of the bit line; a first control signal generator to which an external voltage is supplied for activating the word line; and a second control signal generator to which a core voltage is supplied for controlling an execution of the amplifier by receiving the first control signal.
REFERENCES:
patent: 5267203 (1993-11-01), Hwang et al.
patent: 5610868 (1997-03-01), Inaba et al.
patent: 5892722 (1999-04-01), Jang et al.
patent: 6009040 (1999-12-01), Choi et al.
patent: 6038180 (2000-03-01), Hoshi
patent: 6891773 (2005-05-01), Park
patent: 01-173390 (1989-07-01), None
patent: 02-189791 (1990-07-01), None
patent: 03-016082 (1991-01-01), None
patent: 04-192182 (1992-07-01), None
patent: 05-013709 (1993-01-01), None
patent: 09-180472 (1997-07-01), None
patent: 11-039899 (1999-02-01), None
Blakely & Sokoloff, Taylor & Zafman
Hynix / Semiconductor Inc.
Nguyen Tan T.
LandOfFree
Method for sensing bit line with uniform sensing margin time... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for sensing bit line with uniform sensing margin time..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for sensing bit line with uniform sensing margin time... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3639291