Method for self-aligned polysilicon contact formation

Fishing – trapping – and vermin destroying

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437193, H01L 2188, H01L 21316, H01L 2178

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active

052780988

ABSTRACT:
A polycrystalline silicon layer is deposited and patterned to define a level of interconnect. Contact openings to lower conductive layers are then defined and patterned. A refractory metal such as tungsten is selectively deposited over the device, so that it adheres to the polycrystalline silicon in the interconnect leads and silicon of the lower conductive layer which is exposed in the contact openings. This provides a low resistance interconnect, and good, metal, contacts to underlying layers. Shared contacts between two or more polycrystalline silicon interconnect layers and in underlying conductive layers such as a substrate are easily formed using this technique.

REFERENCES:
patent: 4102733 (1978-07-01), De La Moneda et al.
patent: 4874719 (1989-10-01), Kurosawa
patent: 4900690 (1990-02-01), Tamura
patent: 4966864 (1990-10-01), Pfiester
IBM Technical Disclosure Bulletin; vol. 14, No. 1, 6-71. R. R. Garnache and R. M. Quinn.

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