Method for selectively etching oxides

Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step

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156646, 156657, 156653, H01L 2100

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active

053762339

ABSTRACT:
A method for selectively etching oxides from the face of a semiconductor layer 10 is disclosed herein. The semiconductor layer 10 has at least first and second oxide regions 12 and 14 formed on the surface thereof. The oxides 12 and 14 may be doped oxides such as BPSG or PSG and/or thermally treated oxides such as a thermally grown oxide or a deposited oxide which is subsequently annealed. Native and chemical oxides are also considered. The semiconductor wafer 10 is heated to a temperature greater than room temperature (e.g., about 25.degree. C.) and a vapor phase hydrogen fluoride etch is performed so that one of the oxides 14 etches away at a rate significantly higher than the other oxide region 12. Other systems and methods are also disclosed.

REFERENCES:
patent: 4605479 (1986-08-01), Faith
patent: 5173152 (1992-12-01), Tanaka
"VLSI Fabrication Principles: Silicon and Gallium Arsenide", Ghandi; .COPYRGT.1983; John Wiley & Sons, Inc.; pp. 353-355, 424-427.
"Gas-Phase Selective Etching of Native Oxide"; Miki et al.; IEEE Transactions on Electron Services; 37(1990) Jan. 1, No. 1.
"the Dry Ox Process for Etching Silicon Dioxide", Bersin et al.; Solid State Techn.; 20(4); 78-80.
"8th Symposium on ULSI Ultraclean Technology-Submicron ULSI Process Tech."; Japan, pp. 200-201.
"Submicron ULSI Process Technology: Proceedings of Symposium on ULSI Ultraclean Techn", Japan, pp. 172-181.
"Etching of thin SiO2 layers using wet HFgas", P. A. M. Van Der Heide et al., Journal of Vacuum Science and Tech.: Part A, May 1989, pp. 1719-1723.
"Etch Rate Reduction Via Rapid Thermal Annealing"; Research Disclosure; Anon.; 283,738; 1987; Abstract.

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