Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2000-08-31
2002-02-12
Bowers, Charles (Department: 2823)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S623000
Reexamination Certificate
active
06346484
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to semiconductor device manufacturing, and more particularly to methods for forming air gap-containing metal/insulator interconnect structures for Very Large Scale Integrated (VLSI) and Ultra-Large Scale Integrated (ULSI) devices and packaging, wherein the air gaps are formed in such structures by removing sacrificial place-holder materials from predefined cavities using supercritical fluid (SCF)-based extraction processes.
BACKGROUND OF THE INVENTION
Device interconnections in Very Large Scale Integrated (VLSI) or Ultra-Large Scale Integrated (ULSI) semiconductor chips are typically effected by multilevel interconnect structures containing patterns of metal wiring layers called traces. Wiring structures within a given trace or level of wiring are separated by an interlevel dielectric, while the individual wiring levels are separated from each other by layers of an interlevel dielectric. Conductive vias are formed in the interlevel dielectric to provide interlevel contacts between the wiring traces.
By means of their effects on signal propagation delays, the materials and layout of the interconnect structures can substantially impact chip speed, and thus chip performance. Signal propagation delays are due to RC time constants, wherein ‘R’ is the resistance of the on-chip wiring, and ‘C’ is the effective capacitance between the signal lines and the surrounding conductors in the multilevel interconnection stack. RC time constants can be reduced by lowering the specific resistance of the wiring material, and by using interlevel and intralevel dielectrics (ILDs) with lower dielectric constants, k.
One highly preferred metal/dielectric combination for low RC interconnect structures is copper, i.e., Cu, metal with a dielectric such as SiO
2
(k~4.0). Due to difficulties in subtractively patterning copper, copper-containing interconnect structures are typically fabricated by a damascene process.
In a typical damascene process, metal patterns inset in a dielectric layer are formed by the steps of: (i) etching holes (for vias) or trenches (for wiring) into the interlevel or intralevel dielectric; (ii) optionally, lining the holes or trenches with one or more adhesion or diffusion barrier layers; (iii) overfilling the holes or trenches with a metal wiring material; and (iv) removing the metal overfill by a planarizing process such as chemical-mechanical polishing (CMP), leaving the metal wiring material even with the upper surface of the dielectric. These processing steps can be repeated until the desired number of wiring and via levels have been fabricated.
Low-k alternatives to SiO
2
include carbon-based solid materials such as diamond-like carbon (DLC), also known as amorphous hydrogenated carbon (a-C:H), fluorinated DLC (FDLC), SiCO or SiCOH compounds, and organic or inorganic polymer dielectrics. Nanoporous versions of SiO
2
and the above-mentioned carbon-based materials have even lower k values, while air gaps have the lowest k values of any material (k of about 1.0). (Note that the air in the air gap may comprise any gaseous material or vacuum.)
Examples of multilayer interconnect structures incorporating air gaps are described, for example, in U.S. Pat. No. 5,461,003 to Havemann, et al.; U.S. Pat. No. 5,869,880 to A. Grill, et al.; and U.S. Pat. No. 5,559,055 to Chang, et al.
Air gaps in interconnect structures are most commonly formed by using a sacrificial-place-holder (SPH) material which is removed or extracted from beneath a permeable or perforated bridge layer to leave behind a cavity that defines the air gap. The exact method by which the sacrificial material is removed depends on: (i) the type of sacrificial material employed; (ii) the other materials in the structure to which the SPH removal process must be selective; and (iii) the geometry employed for the bridge layer. Examples of materials that may be utilized as SPHs include:
poly(methylmethacrylate) (PMMA) and parylene (e.g., poly-para-xylylene sold under the trademark “Paralylene”) which may be removed by organic solvents, oxygen ashing, and/or low temperature (~200° C.) oxidation, and norborene-based materials such as BF Goodrich's Unity Sacrificial Polymer™, which may be removed by low temperature (350°-400° C.) thermal decomposition into volatile by-products.
In the case of the Unity™ material, the volatile decomposition by-products may diffuse through a solid bridge layer, as demonstrated by Kohl, et al., Electrochemical and Solid-State Letters 1 49 (1998), for structures comprising SiO
2
(500 nm) bridge layers deposited by low temperatureeplasma-enhanced chemical vapor deposition (PECVD). Other prior art approaches utilize bridge layers containing perforations or access holes through which the SPH materials may be dissolved, etched and/or volatilized.
FIGS. 1A-1B
and
2
A-C illustrate, in cross-sectional view, two prior art extraction methods that are typically employed in forming air gaps. Specifically,
FIGS. 1A-1B
show creation of an air gap in a cavity bounded by substrate
10
, conductive material
20
, and permeable dielectric bridge layer
30
. Upon heating, SPH material
40
in
FIG. 1A
forms volatile decomposition products which diffuse through bridge layer
30
to form air gap
50
of FIG.
1
B.
FIGS. 2A-2C
show air gap creation in a structure containing a perforated bridge layer
60
, with perforation
70
. SPH material
40
in
FIG. 2A
is removed to form the structure of
FIG. 2B
with air gap
80
by a process such as plasma-etching in a reactive gas. Perforation
70
may then be pinched-off by depositing dielectric layer
90
to form the structure of FIG.
2
C.
While the above-mentioned prior art extraction methods may work in principle, reduction to practice is often difficult. For instance, bridge layers may crack or blister if SPH volatilization is too fast; and SPH removal may be inefficient and/or incomplete for SPH material not in the immediate vicinity of a bridge layer perforation. Incomplete removal is a particular concern for plasma-based removal processes, in which the active radical species may become deactivated before reaching recessed SPH residuals. In addition, oxygen-based removal processes (e.g., thermal and/or plasma) may attack the conductive wiring materials. These problems can be exacerbated by the fact that the holes or perforations in a bridge layer are preferably small, with relatively high aspect ratios, to facilitate the “pinch-off” deposition processes used to seal the holes. The term “high aspect ratio”, as used herein, denotes a hole whose height to width ratio is greater than 1.0. Small holes are a particular problem for solvent-based wet removal processes, because surface tension effects prevent effective solvent penetration.
In view of the drawbacks mentioned hereinabove concerning prior art extraction methods, there is a continued need for developing a new and improved method for fabricating air gaps in interconnect structures.
SUMMARY OF THE INVENTION
One object of the present invention is to provide an improved method for extracting SPH materials whose removal is required to form air gaps in interconnect structures.
A further object of the present invention is to provide a method for extracting SPH materials that is reliable, manufacturable, highly selective (so as not to damage the non-extractable components of the interconnect structure), environmentally benign, and scalable to increasingly remote cavities and increasingly smaller perforations (or access holes) in the bridge layer.
An additional object of the present invention is to provide a method for extracting SPH materials from cavities that are not necessarily in interconnect structures, such as cavities in micromechanical devices or in other microelectronic devices.
These and other objects and advantages are achieved in the present invention by employing supercritical fluid (SCF)-based methods to extract sacrificial place-holding materials whose removal is required to form air gaps in interconnect structures. Specifically, the present i
Cotte John Michael
Jahnes Christopher Vincent
McCullough Kenneth John
Moreau Wayne Martin
Nitta Satyanarayana Venkata
Bowers Charles
Brewster William M.
Scully Scott Murphy & Presser
Trepp, Esq. Robert M.
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