Electrical computers and digital processing systems: support – Computer power control – Power conservation
Reexamination Certificate
2000-12-18
2004-02-17
Lee, Thomas (Department: 2185)
Electrical computers and digital processing systems: support
Computer power control
Power conservation
C713S323000, C713S600000
Reexamination Certificate
active
06694442
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a computer system. More specifically, the present invention discloses a power saving method and system for a portable computer.
2. Description of the Prior Art
Portable computing is an increasingly popular option for users. This ubiquity of notebook computers presaged consumer demand for extending the operational battery life of these portable systems, either through improved battery technology or more energy-efficient components.
A rather heavy-handed method used to extend battery time on a portable computer includes a sleep mode. Under this method, after a certain amount of time has passed during which the user has not used the computer system, the central processing unit (CPU) saves the state of the computer into memory and then goes into a suspend state that consumes relatively little power. In this suspend state, the display is turned off, the disk drive spins down and the system bus enters an idle state with the dynamic random access memory (DRAM) placed in a self-refresh mode. An external interrupt, such as from a pointing device or keyboard, “wakes up” the computer, bringing both the bus and the DRAM back online, and pulling the CPU out of the suspend state. The CPU then turns on the display, spins up the hard drive and restores its prior state, resuming execution of the process it had left off when it entered into the sleep state.
The CPU has been targeted by manufacturers as a primary consumer of battery power, and the manufacturers of CPUs have thus come up with certain methods to reduce the power usage of the CPU. With certain CPUs, it is now possible to adjust the operating clock frequency by changing an internal multiplier of a phase-locked loop (PLL) circuit within the CPU, and it is also possible to change the operating voltage of the CPU. When the CPU runs at slower clock speeds, or at lower voltages, it requires less power. For many of the most common applications, a CPU running at a reduced speed is usually sufficiently fast to not incur any inconvenience for the user.
However, the CPU is only one of many components within the portable computer. The system bus, DRAM and video chipset all also consume power. If the operating speeds of these components could be reduced when the internal operating frequency of the CPU is reduced, additional power would be saved. However, with current personal computer systems, changing the operating frequency of these components is not supported as abrupt changes to the bus clock could lead to crashing of the CPU, the video chipset or the chipset that implements the system bus.
SUMMARY OF THE INVENTION
It is therefore a primary objective of this invention to provide a system and method for a computer system that enables changing the operating frequency of a bus within the computer system to reduce power used by components on the bus.
The present invention, briefly summarized, discloses a method and system for managing power consumption in a computer. The computer has a system controller for implementing a bus, a central processing unit (CPU), a memory, a first power management routine, a second power management routine, a clock generator, and an event controller. The system controller uses a host clock signal that determines the operating frequency of the bus. The clock generator generates the host clock signal. The first power management routine has computer code that saves state information of the computer system in the memory and that places the system controller into an idle state. The second power management routine restores the computer system using the state information stored in the memory. The event controller is used to implement the method of the present invention. The event controller sends an interrupt to the system controller to cause the CPU to execute the first power management routine, which then saves the state of the CPU and system controller in a reserved space in memory, and which then places the system controller and the CPU into an idle state. The event controller programs the clock generator to change the host clock to a new frequency, then activates the CPU and system controller after the host clock signal has changed to the new frequency, and causes the CPU to execute the second power management routine. By changing the host clock signal to the new frequency when the system controller and CPU are in their respective idle states, the event controller prevents the system controller and CPU from crashing. By changing the frequency of the host clock, the operating frequency of the bus is changed, and by changing the operating frequency of the bus the total power consumption of the computer system, which includes the CPU, memory, system controller and VGA, is changed.
It is an advantage of the present invention that the event controller can change the operating frequency of all the components within the computer system while the components are in an idle state. This prevents the components from crashing due to an abruptly changing timing signal. With the components running at a lower frequency, the computer system will consume less power. Alternatively, with the components running at full speed, the full processing power of the computer system is restored. Also, if the components permit it, the event controller may reduce the core voltage of the components when they run at the lower frequency, further reducing the individual power needs of the components.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment, which is illustrated in the various figures and drawings.
REFERENCES:
patent: 5218704 (1993-06-01), Watts et al.
patent: 5490059 (1996-02-01), Mahalingaiah et al.
patent: 5727193 (1998-03-01), Takeuchi
patent: 5754869 (1998-05-01), Holzhammer et al.
patent: 5925133 (1999-07-01), Buxton et al.
patent: 6367023 (2002-04-01), Kling et al.
patent: 6528974 (2003-03-01), Mirov et al.
patent: 6574740 (2003-06-01), Odaohhara et al.
patent: 6608476 (2003-08-01), Mirov et al.
patent: 0770952 (1999-05-01), None
AsusTek Computer Inc.
Cao Chun
Hsu Winston
Lee Thomas
LandOfFree
Method for saving power in a computer by idling system... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for saving power in a computer by idling system..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for saving power in a computer by idling system... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3300990