Electrical computers and digital processing systems: virtual mac – Task management or control – Process scheduling
Reexamination Certificate
2003-04-24
2008-12-23
An, Meng-Ai (Department: 2195)
Electrical computers and digital processing systems: virtual mac
Task management or control
Process scheduling
C711S135000, C712S216000, C712S219000
Reexamination Certificate
active
07469407
ABSTRACT:
The processing of instructions from multiple threads using a shared dispatch pipeline is controlled by invoking a dispatch flush operation wherein instructions of a selected thread in the shared dispatch pipeline are flushed in response to resource requirements. A first thread in an SMT may be using more processing than corresponds to its priority because its instructions are dominating use of a shared resource. In this case, to rebalance instruction dispatch between the first thread and the second thread, a dispatch flush of instructions of the first thread is issued. Normally the flushed instructions of a thread are refetched and reenter the dispatch pipeline. If the first thread is dominating use of shared resources, hold may be issued following the dispatch flush holding instructions of the first thread until a balanced utilization is realized.
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Burky William E.
Eickemeyer Richard J.
Kalla Ronald N.
Levitan David S.
Sinharoy Balaram
An Meng-Ai
International Business Machines - Corporation
Salys Casimer K.
Wai Eric C
Winstead P.C.
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