Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-09-11
1998-12-29
Shah, Alpesh M.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
395733, 395712, 395280, 711163, G06F 1200
Patent
active
058549374
ABSTRACT:
There is disclosed a method for reprogramming a 5 volt flash ROM, which includes EISA configuration code and boot code stored together in the same sector. The method of the present invention includes determining the type of flash ROM being used, and performing steps necessary to preserve the boot code while permitting reprogramming of the EISA configuration code. The method of the present invention includes modifying the conventional interrupt routine (Interrupt 15) that is used to set up and configure newly added expansion boards in an EISA bus system. The modified routine monitors the interrupt functions to determine if an erase or write is requested to the EISA configuration block in flash ROM. If an erase or write is detected, specific routines are initiated to enable the CPU to enter a protected mode to perform the necessary command sequences to the 5 volt flash ROM. In addition, necessary steps are taken to prevent the erasure of the boot code or other information in the sector that is not related to EISA configuration code during erase operations, and to prevent overwriting the boot code during write operations.
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Dell U.S.A. L.P.
Shah Alpesh M.
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