Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate
2007-05-22
2007-05-22
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Replacement of memory spare location, portion, or segment
C714S763000
Reexamination Certificate
active
10133795
ABSTRACT:
Method for repairing hardware faults in memory chips. According to one embodiment, a method is provided for repairing bit errors in memory chips having a multiplicity of memory cells. The method can include detecting bit errors using an error identification algorithm. Further, the method can include determining the addresses of faulty memory cells. The method can also include setting a data bit initiating a repair mode in response to detecting a bit error. In the repair mode, a signal present on a data line to the memory chips can be interpreted as a repair command to perform a repair. In addition, the method can include repairing the bit errors by activating redundant memory cells.
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Ruckerbauer Hermann
Schamberger Florian
Infineon - Technologies AG
Jenkins Wilson Taylor & Hunt, P.A.
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