Method for repairing defective electrical connections on multi-l

Coating processes – Measuring – testing – or indicating

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427 96, 427123, 427261, 427282, 427404, B05D 512

Patent

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057470952

ABSTRACT:
A multi-layer thin film structure having defined repair lines thereon and a method for repairing interconnections in the multi-layer thin film structure (MLTF) and/or making engineering charges (EC) are provided. The method comprises determining any interconnection defects in the MLTF at a thin film layer adjacent the top metal layer of the structure, using lithography, e.g., direct write expose technology, to define the top surface connections needed to repair the interconnections and/or make EC's, and forming the top surface metallization and repair lines using additive or substractive metallization techniques.

REFERENCES:
patent: 4254445 (1981-03-01), Ho
patent: 4480288 (1984-10-01), Gazdik et al.
patent: 4489364 (1984-12-01), Chance et al.
patent: 5220490 (1993-06-01), Weigler et al.
patent: 5224022 (1993-06-01), Weigler et al.
patent: 5243140 (1993-09-01), Bhatla et al.
patent: 5258236 (1993-11-01), Arjavalingam et al.
IBM Technical Disclosure Bulletin, vol. 20, No. 9 Feb. 1978 C.W. Ho and C.Y. Ting, Planar Wiring Repair Technique for the Thin-Film Metal Package Via Solder Evaporation, vol. 20, No. 9, IBM Corp. 1978, pp. 3729-3730.

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