Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing
Reexamination Certificate
2007-08-21
2010-11-30
Kindred, Alford W (Department: 2181)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Scoreboarding, reservation station, or aliasing
C712S218000, C712S210000
Reexamination Certificate
active
07844800
ABSTRACT:
A processor2utilising register renaming executes program instructions requiring a large number of architectural register specifiers to be renamed by dividing the renaming tasks into an initial set and a remaining set. The initial set are performed first and the results passed via a main channel32for further processing. The remaining set are performed in sequence with the results being passed via a background channel34for further processing. This technique is particularly useful for performing renaming operations for load/store multiple LDM instructions.
REFERENCES:
patent: 6049839 (2000-04-01), Fujii et al.
patent: 2005/0091475 (2005-04-01), Sodani
ARM Ltd, ARM® Instruction Set Quick Reference Card, Oct. 2003.
GB Search Report for GB0619522.6 dated Jan. 4, 2007.
Airaud Cédric Denis Robert
Begon Florent
Lataille Norbert Bernard Eugéne
Vincent Melanie Emanuelle Lucie
ARM Limited
Kindred Alford W
Moll Jesse R
Nixon & Vanderhye P.C.
LandOfFree
Method for renaming a large number of registers in a data... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for renaming a large number of registers in a data..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for renaming a large number of registers in a data... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4219402